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TPS735: External FB issue issue with DAC on TPS73501

Frank Rothoff
Expert 6420 points
Part Number: TPS735

Hello team,

Customer question translated with TI-Translator,

Today, a tricky question. I am using the TPS73501. I set the VOUT voltage with a DAC. The signal is called "IR_DAC". "IR_DAC" is generated with an 12bit DAC, max. 3.0V output. Setting range of the LDO about 0.2V.. 3.0V for Vout. In principle, this also works with 100% of all PCB's, if the DAC step size is not too large. In 99% of the PCB's, the step size of the DAC plays absolutely no role. The voltage IR_DAC can be switched from 0 to 3V and back to 0V. This works as often as you like with the 99% of the PCB's. Only the 1% of ICs worry me. If you select the increment of the DAC here too large, specifically approx. >2000 (i.e. IR_DAC from 0V to 1.5V and then again to 0V ), then this does not work for 1% of all ICs. The voltage Vout then goes to the operating voltage of the IC of 3.3V. A line will probably be conductive internally in the IC. (Parasitic thyristor ?) However, nothing is broken. However, the circuit always works in slightly smaller DAC steps, i.e. less than 1800 (i.e. IR_DAC from 0V to 1.3V). Maybe the problem will be solved if I increase the capacitor C148 ? But what would be a good value, which has no negative effects, but nevertheless solves the problem? And why do 99% of ICs always work? Can certainly be simulated. But does the simulation map reality exactly enough? The problem could also be solved by means of increment limitation, only that would be a SW change, but it is too late for that. 

Appreciate an answer soon.

P.S. I'm at the FAE Summit this week. 

  • 0
    TI__Guru 50025 points

    Hi Frank,

    First, they have put C148 in the wrong spot. I think what they were intending to do was add a feedforward capacitor, but a feedforward capacitor goes from VOUT to FB (for reasonably modern devices - old devices were from ADJ (or FB) to GND). Where they have put it can actually cause the device to become unstable. 10pF might be small enough to not notice it, so perhaps they just got lucky. I would recommend removing this capacitor entirely. Furthermore, the datasheet says that a feedforward capacitor is required for stability. Are they seeing any signs of instability? 

    It sounds like the issue is with the speed that the VOUT is toggled. When the device output goes to 3.3V, does it stay there? Or does it just pulse to 3.3V and then settle back down? 

    Do you have any waveforms showing any of this behavior?

    Thanks,

    Nick

  • 0 in reply to Nick Butts
    TI__Expert 6420 points

    Customer feedback:

    The behavior does not change when C148 is removed. There are also no stability problems with >1000 PCB's, even if according to Data sheet should be a >3pF CFF. My 10pF should not be CFF, but reduce the noise at the VREF input. I could imagine that an increase in C148 will solve the "jump problem", because it will reduce the rate of change of VOUT, possibly at the expense of control stability. I will test. It sounds like the issue is with the speed that the VOUT is toggled. Exactly ! And it only affects a few PCB's. The SW makes this big DAC jump from about 1900 to 4000 only once, when calibrating the sensor. Never again afterwards. The DAC jumps are then < +500. For DAC jumps from large values to small values, everything is always OK, no matter how high the jump height is. With DAC in steps of 1000: Everything is OK VOUT does what it should, is also stable. DAC Value = 4095: = 3.0V at the DAC 

    With DAC in step 4000: Voltage Vout goes to the supply voltage of 3.24V (instead of 0.2) and remains stable there. Nothing swings there. For DAC in steps of 2000 the same. Steps of 1500 work. 

    Enable from High--> Low -< High : Then the voltage goes to the correct value of 0.2V 

  • 0 in reply to Frank Rothoff
    TI__Guru 50025 points

    Hi Frank,

    Thanks for the waveforms and further explanation; I understand the issue now. 

    Have you tried capturing waveforms of VFB as well? What is happening seems counterintuitive to me; when the DAC output transitions from low to high (0 -> 3V), in the short-term the FB voltage would rise while VOUT stays at the initial regulation point because the output cap holds it there. In this scenario, the device would close the channel until VOUT falls enough for VFB to be properly regulated again. It seems that the opposite is happening here where the channel is latching to fully on. I wonder if some waveforms (more zoomed in to show the transient behavior) would shed some light on what is happening. 

    You can try using a larger C148, but do be cautious about it. Even if the device doesn't become totally unstable and oscillate, the transition that you are doing here might get more "ringy" and overshoot more. 

    Regards,

    Nick

  • 0 in reply to Nick Butts
    TI__Expert 6420 points

    Customer feedback:

    At the moment, I cannot make measurements with an oscilloscope of the voltages. Next week I've the first option. The measurements are currently made with the AD converter on the board, which here can only measure the voltages Vout and IR_DAC with a resolution of 20ms. I suspect the classic latch-up effect, where a parasitic thyristor ignites by a positive spike at the VFB input. C148 is intended to reduce this spike. Why only 1-2% of ICs do this remains unclear. C148 =100nF Then DAC jumps go until 3000. After that, they are no longer reliable. But the noise of Vout is too big for me. 100nF will safely avoid the spikes on VFB. That speaks against my thyristor theory. Some ICs probably do not like large voltage changes to VFB in a short time. We first sort out the PCB's with this behavior and then strive for the SW solution, which limits the jump height. 

  • 0 in reply to Frank Rothoff
    TI__Guru 50025 points

    Hi Frank,

    It is hard to say what is happening without oscilloscope plots, so I will have to wait until you are hopefully able to collect some. I haven't personally seen a latching event that is caused by the FB voltage changing too quickly; every case of latching that I've seen is from a reverse voltage from IN to OUT. With that said, I can't discount the idea. I just don't have a way to prove it. 

    Regards,

    Nick