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TPS65218D0: DCDC3 sequence and strobe difference between TPS65218B1 and TPS65218D0

Satoshi
Guru 19585 points
Part Number: TPS65218D0
Other Parts Discussed in Thread: TPS65218EVM-100

When replaced from TPS65218B1 to TPS65218D0 without changing the circuit and registers, there was a difference in the DCDC3 sequence.

The STROBE delay setting remains at the default 2ms.

The delay time of the TPS65218B1 (current product) is about 2.152ms, while that of the TPS65218D0 is about 4.16ms.

Is this an improvement change from B1 to D0?

Or are there other factors?

Please refer below for waveforms.

※V1.8BAT (TP6): DCDC6

For reference, the register dump is below.

・TPS65218D0
0x00: 05 10 00 00 00 28 00 00
0x08: 00 00 00 00 00 00 00 00
0x10: 00 3f 13 4c c0 00 19 29
0x18: 92 b2 06 1f 00 00 00 00
0x20: 00 00 98 75 12 63 03

・TPS65218B1
0x00: 03 10 00 00 00 28 00 00
0x08: 00 00 00 00 00 00 00 00
0x10: 00 3f 13 48 c0 00 19 29
0x18: 92 b2 06 1f 00 00 00 00
0x20: 00 00 98 75 12 63 03

Best regards,

Satoshi

  • 0
    TI__Mastermind 19060 points

    Hi Satoshi,

    According to the sequence settings, there should be ~4ms of delay between LDO1 ramp up and DCDC3 ramp up. Also there should be about ~4ms of delay between DCDC3 ramp up and DCDC4 ramp up.

    If the B1 version was not achieving this then the D0 has likely improved this aspect through general bug fixes and optimization.

    Regards,

    James

  • 0 in reply to James Steenbock
    Guru 19585 points

    Hi James,

    Thank you for reply,

    The difference between B1 and D0 was seen between STROBE5 and STROBE6.

    (Time from DCDC3 to LS1)

    I checked the data sheets for B1 and D0, but there was no difference in the descriptions for DCDC3 and LS1.

    Is this spec difference correct? Or do you have other problems?

    ・TPS65218B1: 2.16ms

    ・TPS65218D0: 4.16ms

    Best regards,

    Satoshi

  • 0 in reply to Satoshi
    TI__Mastermind 19060 points

    Hi Satoshi,

    I have provided a couple scope captures of the power-up sequence from a TPS65218D0 chip that is used in our TPS65218EVM-100 board. I am seeing ~2ms between DCDC3 and LS1:

    Can you show DCDC6, DCDC3, and LS1 in one capture similar to the ones above? Also can you share your schematic so I can check the components?

    Regards,

    James

  • 0 in reply to James Steenbock
    Guru 19585 points

    Hi James

    Thank you for confirming,

    DCDC6 is equal to V1.8BAT (Blue), startup waveform is attached below.

    May I contact to you offline or e-mail for send detailed schematic?

    Best regards,

    Satoshi

  • 0 in reply to Satoshi
    TI__Mastermind 19060 points

    Hi Satoshi,

    Please accept my friend request and I I can set up a private chat for you to share the schematic.

    Regards,

    James

  • 0 in reply to James Steenbock
    TI__Mastermind 19060 points

    Hi Satoshi,

    Do you have another TPS65218D0 chip to test on the board? Can you check to see if another D0 chip shows the ~4ms between DCDC3 and LS1? This might help to see if there's significant variation between D0 chips. Also please send me a picture of the IC top marking in the private chat for our record.

    I will update you on my schematic notes by the end of the day Friday (US Central Time) as we discussed.

    Regards,

    James

  • 0 in reply to James Steenbock
    TI__Mastermind 19060 points

    Hi Satoshi,

    I didn't see any major issues with the schematic. My only recommendation would be to add a bit more output capacitance on DCDC4 in order to meet the minimum recommended target of 40uF.

    However, I did find a difference between the B1 datasheet and the D0 datasheet. Below is a section from the B1 datasheet:

    If we look at the same section in the D0 datasheet, this note has been updated with some additional information that my relate to the increased delay between DCDC3 and LS1 (STROBE5 and STROBE6):

    Since all your register settings are the same and you directly swapped the B1 chip with the D0 version, this note may be the difference you are seeing. It's a bit hard to tell but it looks like the DCDC3 ramp up time is slightly faster on the B1 chip in your scope capture. This function allows the power up sequence to succeed even if a power rail takes longer than the delay time to ramp up.

    Regards,

    James