TPS55162-Q1: Vreg not rising when power on sequence stated

Oscar Guerrero

Part Number: TPS55162-Q1

Hi,

I followed most of the sample circuit given in datasheet with unused inputs pulled low and outputs left floating.

I want to convert from 15V to 5.7V. As Vin reaches 15V, the power on sequence does not complete, it seems to be stuck in the Init stage and does not proceed to the ramp stage. Vfb stays close to 0 and Vreg only measures 1.75V, not the typical 4.5V.

Is there a reason Vreg would not be able to reach 4.5V if the only thing connected to that pin is Vreag_q and a 4.7uF cap? Thanks.

over 2 years ago

0 Oscar Guerrero over 2 years ago

Prodigy 10 points

Do PG output require a 100k pull up, or can it be left floating? Is a delay required or can PG_DLY be tied to gnd?

0 Bryce Xun over 2 years ago in reply to Oscar Guerrero

TI__Mastermind 27690 points

Hi Oscar,

Thanks for reaching out on E2E.

I will look into this and reply on Monday.

Regards,

Bryce

0 Bryce Xun over 2 years ago

TI__Mastermind 27690 points

Hi Oscar,

May I know what is the product type and application here?

Please reply with the schematic so I can review it. What is the input voltage range and max output current?

Do you have any waveforms about this? It's strange that Vreg is only 1.75V.

Regards,
Bryce

0 Oscar Guerrero over 2 years ago in reply to Bryce Xun

Prodigy 10 points

Hi Bryce,

This product type is lab prototyping, its meant to act as an intermediate to translation of 15V to ~5.7V so that it can be feed into an LDO to give a stable 5V.

I don't have pictures of the Vreg, however on the o-scope it was a stable 1.75V with some amount of noise, but nothing periodic to show a VREG trying to ramp.

Thanks,

Oscar

0 Oscar Guerrero over 2 years ago in reply to Oscar Guerrero

Prodigy 10 points

Update: Pin 18 was not connected to GND in the layout, this could be causing the logic error. I'm going to solder a jumper wire.

0 Bryce Xun over 2 years ago in reply to Oscar Guerrero

TI__Mastermind 27690 points

Hi Oscar,

From the schematic, here are some comments:

1. PS pin should connect to low or high.

2. As you mentioned, pin18 must connect to GND.

3. Please also share you layout file or picture for review.

I think this device could be damaged if Vreg is only 1.75V after poweron. Please connect pin18 and solder a new device, and capture the Vout, SW1, SW2, Vin and iL when poweron.

Regards,

Bryce

0 Bryce Xun over 2 years ago in reply to Bryce Xun

TI__Mastermind 27690 points

Hi Oscar,

We have not seen an update from you for four weeks, so I assume the questions are answered and the issue is solved.
I close this thread now. If there is still something open, please reply and the thread will get opened again.
If you have any other question or of the thread has been locked, please open a new one.
Clicking the Resolved Button also helps us to maintain this forum.

Regards,

Bryce

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TPS55162-Q1: Vreg not rising when power on sequence stated