Hello,
I would like to confirm that what "deglitch of IN2-IN1 comparator" specification stands for. Can I understand this specification stands for voltage on OUT switching over from IN2 to IN1 presented in Figure 4.
I think Figure 4 must add FET turn on time but I understand that the most of the time is the deglitch time.
Hello,
The deglitch time is the time at which the device waits for the comparator to make the same conclusion before it makes a final decision.
Essentially, "is IN2 greater/less than IN1 with hysteresis for longer than 20us typical?"
If the comparator's conclusion changes within 20 us, the device will wait another 20 us to ensure the result leads to the same conclusion throughout the 20us typ.
Best Regards,
Elizabeth
