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TPSM8D6C24: Package outline information

JH Shin
Mastermind 7145 points
Part Number: TPSM8D6C24

Hello,

My customer inquires for additional information required for system design.

Could you please give them the height information shown in red below?

Thank you.

JH

  • 0
    TI__Mastermind 48240 points

     

    The component in question is a 1.4mm (1.32-1.52) high surface mount IC on top of the 1.0mm thick substrate so it will have a nominal height of 2.5mm and potential tolerance of 2.3 - 2.7mm.

  • 0 in reply to Peter James Miller
    Mastermind 7145 points

    Hello Peter,

    Thanks for your reply.

    The customer makes further inquiries for accurate thermal analysis.

    1. Could you please give them the dimension information marked in red below?

    2. In the datasheet below, which locations of the device do ψJT and ψJB mean?

    3. Does Tj mean the temperature of A and B below?

    4. Could you please provide them the θJA junction to top, θJB junction to bottom and Tj (junction temp.) for each of A,B,C,D products?

    5. Are A and B the same product? Does it generate the same heat when operating?

    6. Are C and D the same product? Does it generate the same heat when operating?

    7. How many layers is the PCB?

    Thanks,

    JH

  • 0 in reply to JH Shin
    TI__Mastermind 48240 points

     

    JH Shin said:
    1. Could you please give them the dimension information marked in red below?

    I will need to check. 

    Device C and D are 5mm x 7mm plastic encapsulated integrated circuit packages.

    Device A and B are 6.5 x 6.5mm composite shielded core inductors

    I will need to look for the positioning of these components

    JH Shin said:
    2. In the datasheet below, which locations of the device do ψJT and ψJB mean?

    The top surface of devices C and D (Top) and the exposed PGND pad on the bottom (Bottom) 

    JH Shin said:
    3. Does Tj mean the temperature of A and B below?

    No, A and B do not have silicon and thus do not have a "junction"  Tj means C and D

    JH Shin said:
    4. Could you please provide them the θJA junction to top, θJB junction to bottom and Tj (junction temp.) for each of A,B,C,D products?

    The temperature for each of the devices is going to depend heavily on the operating conditions and thermal environment, so I can't provide the junction temperatures.

    I do not have θja or θjb for devices A or B, 

    θja for devices C and D are listed in the datasheet

    θjab for C and D are approximately 4°C/W

    JH Shin said:
    5. Are A and B the same product? Does it generate the same heat when operating?

    Yes, A and B are the same product.  In a 2-phase configuration they dissipate the same heat, in a dual single-phase, it depends on the relative loading current.

    JH Shin said:
    6. Are C and D the same product? Does it generate the same heat when operating?

    Yes, C and D are the same product.  In a 2-phase configuration, they dissipate the same heat.  In a dual single-phase, it depends on their relative loading and configuration. 

  • 0 in reply to Peter James Miller
    TI__Mastermind 48240 points
    JH Shin said:
    1. Could you please give them the dimension information marked in red below?

    As these dimensions are not from the datasheet, they are all approximate and subject to change without notice.

    JH Shin said:
    7. How many layers is the PCB?

    The Carrier substrate is 6-layers with 2oz external and 1oz internal layers.

  • 0 in reply to Peter James Miller
    Mastermind 7145 points

    Hello,

    Thanks,

    The customer has additional questions.

    Q1) Does the θjab of C and D elements mean θja = 4C/W, θjb = 4C/W?

    Q2) Which part of Board 1 or Board 2 is the location of θjb below?

    Regards,

    JH

  • 0 in reply to JH Shin
    TI__Mastermind 48240 points
    JH Shin said:
    Q1) Does the θjab of C and D elements mean θja = 4C/W, θjb = 4C/W?

    Yes, each device has an independent θjb of 4°C/W for it's own power dissipation to the board

    JH Shin said:
    Q2) Which part of Board 1 or Board 2 is the location of θjb below?

     θjb of 4°C/W is to a point on the bottom surface of the module substrate at the PGND pads of the module.