UCC28742: overload protection & valley switching mechanism

Hello,

Please see my comments below.

1) What's the relationships between Vocp(1.5V)

>If the CS pin sees more than 1.5 V for 3 consecutive switching cycles the controller will shut down do to an over current protection fault and will cycle VDD between VDDoff and VDDon to reset the flyback controller.

The following link will bring you to an application note that describes how primary fault sensing works.  It also describes the most common issues with it and how to resolve them.    The UCC28742 has primary fault sensing and you may find this information useful.

https://www.ti.com/lit/pdf/sluaac5

, Vccr(363mV) and Vcst_max(770mV)? 

>This has to do with the device control law.  The peak current and frequency will move with load and line.  Please refer to figure 12 of the data sheet for the control to show how the frequency moves with peak current.

And what's the function of each parameter?

According to the datasheet, Rcs is determined by the Iocc and Vccr, and if Iout has reached Iocc for >=120ms, then gate driver would shutdown and retry. Which makes me confused about the OCP mechanism of UCC28742. 

>You are correct that Rcs is selected on the controlled output current Iocc.

>VCCR is a current regulation constant, this is the voltage the current sense signal is controlled to.

>Your are correct that if the output stays at IOCC for more than 120 ms the device will shut down and ULVO cycle according to the data sheet. 

I select the Rcs resistor based on 110 to 120% of nominal Iocc.  In this way you only shut down the converter if you get excessive loading for 120 ms.

2) How UCC28742 calculate the timing to turn on MOSFET at the valley of VDS ringing? Does it sense the zero crossing point on Vs pin and calculate the resonant frequency?

>The UCC28742 detects zero current at the VS pin and will delay the turn-on of the FET to achieve valley switching.

Regards,