TPS6594-Q1: Questions about PMIC safety mechanism injection fault testing

Hi Yanni,

To trigger faults in the PMIC INT_TOP register and its subregisters, we will perform I2C writes to certain registers or purposely change the hardware configuration to generate the fault. The register to write or hardware configuration depends on the interrupt you are trying to trigger.

For example, an SOC_POWER_ERR or MCU_POWER_ERR can be triggered by clearing a BUCKn_EN bit through I2C without disabling the voltage monitoring. A watchdog error can be done by enabling the watchdog but not feeding the watchdog within the long window. VCCA_UV_INT can be triggered by lowering the input voltage below the VCCA_UV threshold configured in the NVM. Is there a specific fault I can instruct you on how to inject?

The TPS6594-Q1 datasheet Summary of Interrupt Signals shows the interrupts that result from each event. Check the User Guide for your specific NVM configuration to see the power sequences corresponding to the interrupts and which interrupts are masked.

Regards,
Megan