Hello,
I have a few regarding hte BQ27500 upgrade procedure.Since it is very sensitive, meaning that I can destriy the chip due to incorrect operation i am doing things by parts.
I have BQ27500 connected to MSP and I am operating at 300 KHz I2C.
I have verified that I am able to get into the ROM mode (probably) since if I try to refer to the 0xAA address I get no ACK.
Now right after the getting into ROM mode I am trying to get out of ROM mode as described in slua541:
- Write Command 0x00 and Data 0x0F
- Write Command 0x64 and Data 0x0F
- Write Command 0x65 and Data 0x00
From I2C perspective I send the following sequence:
- Start Condition - > 0x16 -> 0 -> 0x0F -> Stop Condition
- Start Condition - > 0x16 -> 0x64 -> 0x0F -> Stop Condition
- Start Condition - > 0x16 -> 0x65 -> 0x00 -> Stop Condition
My problem is that I am not getting ACK (I2C ACK) on the even first write to address 0x16 (I see on scope that the address is correct and the SDA line stays low meaning that I2C is busy...)
The code is as follows:
void bq27501_exit_ROM_mode(void)
{
UCB2CTL1 |= UCSWRST; // Enable SW reset
UCB2I2CSA = BQ27501_ROM_ADDRESS;
UCB2CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2CTL1 |= (UCTR + UCTXSTT);
// Write the command LSB
UCB2TXBUF = 0;
while (!(UCB2IFG & UCTXIFG));
UCB2TXBUF = 0x0F;
while (!(UCB2IFG & UCTXIFG));
UCB2CTL1 |= UCTXSTP;
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2IFG &= ~UCTXIFG;
__delay_cycles(1000);
UCB2CTL1 |= UCSWRST; // Enable SW reset
UCB2I2CSA = BQ27501_ROM_ADDRESS;
UCB2CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2CTL1 |= (UCTR + UCTXSTT);
// Write the command LSB
UCB2TXBUF = 0x64;
while (!(UCB2IFG & UCTXIFG));
UCB2TXBUF = 0x0F;
while (!(UCB2IFG & UCTXIFG));
UCB2CTL1 |= UCTXSTP;
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2IFG &= ~UCTXIFG;
__delay_cycles(1000);
UCB2CTL1 |= UCSWRST; // Enable SW reset
UCB2I2CSA = BQ27501_ROM_ADDRESS;
UCB2CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2CTL1 |= (UCTR + UCTXSTT);
// Write the command LSB
UCB2TXBUF = 0x65;
while (!(UCB2IFG & UCTXIFG));
UCB2TXBUF = 0x00;
while (!(UCB2IFG & UCTXIFG));
UCB2CTL1 |= UCTXSTP;
while (UCB2CTL1 & UCTXSTP); // Ensure stop condition got sent0
UCB2IFG &= ~UCTXIFG;
__delay_cycles(14000000);
}