大家
好我參考LMG1020EVM-006並想獲得2ns脈衝寬度鐳射器,我應該如何在PCB上佈局,
1。可以佈置兩層,還是必須鋪設四層?
2.電路圖上有PGND和GND。PGND和GND之間的連接只是分層連接,不需要用0歐姆電阻隔開?
3.除了氮化鎵低邊驅動器+氮化鎵場效應管,還有其他方法可以降低ESL嗎?
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大家
好我參考LMG1020EVM-006並想獲得2ns脈衝寬度鐳射器,我應該如何在PCB上佈局,
1。可以佈置兩層,還是必須鋪設四層?
2.電路圖上有PGND和GND。PGND和GND之間的連接只是分層連接,不需要用0歐姆電阻隔開?
3.除了氮化鎵低邊驅動器+氮化鎵場效應管,還有其他方法可以降低ESL嗎?
hello everyone
I refer to LMG1020EVM-006 and want to get a 2ns pulse width laser,
How should I lay out on the pcb,
1. Can two layers be laid out, or must four layers be required?
2. There are PGND and GND on the circuit diagram. The connection between PGND and GND is just a layered connection and does not need to be separated by a 0-ohm resistor?
3. Besides GaN Low-side Driver + GaN FET, are there any other ways to reduce ESL?
Hi Chunhan,
1. Can two layers be laid out, or must four layers be required?
Either could work. The EVM does use 4-layers. and has the GND return path for the driver go through the inner layers to make a sort of split-GND configuration. It is similar to the datasheet's suggestion which only requires two-layers:
One last thing to consider, is that usually people don't want a very thin board, so if you opt for a two-layer with the same thickness as a 4-layer, the vias may be worse for your signal. Ultimately either can work and it is up to you.
2. There are PGND and GND on the circuit diagram. The connection between PGND and GND is just a layered connection and does not need to be separated by a 0-ohm resistor?
The board uses layer 2 and 3 to make a rough separation of the GNDs. Ultimately the vias from these layers are acting like the resistor. I do not see any 0Ω jumper on the board elsewhere.
3. Besides GaN Low-side Driver + GaN FET, are there any other ways to reduce ESL?
Red is the turn-on path and blue is off. The reason I highlighted this, is that the VDD-GND capacitor is a very often overlooked element contributing to ESL. This is why the EVM/datasheet recommend using a three-pin capacitor or smaller package one. Another reason I drew this, is that it shows that the FET's source and bypass cap's ground complete the loop, so split ground schemes may increase that ESL. There is a trade-off because that ESL is the impedance that blocks high-frequency noise.
Thanks,
Alex M.
Hello Alexander:
1.Can the two resistors at R1 and R2 remove the direct connection?
2.I mainly want to see that the pulse width of the laser output is within 2ns
And the repetition rate is up to 250KHZ, is it necessary to add a charging resistor at the input end of the capacitor?
Hello Chunhan,
1.Can the two resistors at R1 and R2 remove the direct connection?
I'm sorry but I don't know what you mean by this. Those resistors should be 0Ω jumpers, so they are essentially a short. You could place a wide range of different resistors here, including none at all and shorting to the gate. If you want a very fast rise/fall time, those resistors will have to be small or 0. However, lower resistance in this RLC circuit will mean more ringing due to less damping. If you look in the user's guide, the short pulses can look pretty bad.
2.I mainly want to see that the pulse width of the laser output is within 2ns
I'm not sure what charging resistor you are referring to? Here is my understanding:
The board comes with placeholders for a laser diode and resistors, you can achieve the desired pulse with a resistor that mimics the diode's impedance, then populate the real diode. When the actual diode is being used, there should be very little resistance in this loop, and the resistor load should be removed. This loop has no discrete resistor, so that is why I am not sure which resistor you mean.
Thanks,
Alex M.