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TPS7A20: When does active discharge stop

Austin Allen
Intellectual 2260 points
Part Number: TPS7A20

Hi team,

Got a question from a contact about the TPS7A20. They are wanting the output of the device to discharge completely in a UVLO event. 

The datasheet specs that active discharge occurs when EN goes low or when VIN < UVLO however, it's not clear when the active discharge stops/

1. Is there a specified point at which the active discharge is considered "complete" and the FET opens back up?

2. If the input voltage drops out entirely, will we still be able to bias the FET so as to close the FET and discharge the output? Or is it possible that the FET would have to stay open and we'd be stuck with charge on the output?

Thank you!

Austin Allen

  • 0
    TI__Mastermind 43505 points

    Hi Austin,

    The FET should stay on while the device is supposed to be off to keep its output low, so there shouldn't be a point where it turns back off. If there is no input supply the pulldown cannot be biased, so as you mentioned there would be charge at the output. However, once there is enough charge, the body diode of the pass FET will start to conduct and charge will also end up at the input. Once there is enough charge at the input, I think what would happen is that the device will eventually be biased enough to activate the pulldown and sink some of the output (and input) charge until there is not enough charge at the input for biasing, and the device would shut off. This cycle would then repeat as long as there is some leakage onto the output. 

    Regards,

    Nick

  • 0 in reply to Nick Butts
    TI__Intellectual 2260 points

    Hey Nick,

    Thanks for the detailed explanation!

    It sounds like if we want the output to fully discharge through the pull-down, the input would need to stay up long enough for this to happen. Is there a value for the pull-down resistance that we discharge through so that the discharge time can be estimated?

    Also, do any of our LDOs have an architecture such that charge is not required at the input in order to bias the pulldown?

    Best,

    Austin Allen

  • 0 in reply to Austin Allen
    TI__Mastermind 43505 points

    Hi Austin,

    I'll check the design for the nominal pulldown resistance. 

    I think the pulldown is always going to be an n-channel device, so I'm guessing we don't have any devices that could have an active pulldown without power. I'll look through our devices that have active pulldown and see if I can find one that fits.

    Regards,

    Nick

  • +1 in reply to Austin Allen
    TI__Mastermind 43505 points

    Hi Austin,

    The pulldown resistance is about 150ohm ± 50%. 

    I looked and I think all of the active pulldown circuits use an n-channel device after all, so the device will always need biased for the active pulldown to work. 

    Regards,

    Nick