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UCD9090-Q1: FPWM7 GPIO11 not staying low during power-up

Clément Letonnelier
Expert 2426 points
Part Number: UCD9090-Q1

Hello,

We have been experiencing an unexpected behavior on one UCD9090-Q1 device.

During the P3V3 power-up, the FPWM7 GPIO11 of that device does not stay low as it would be expected from the datasheet.

The screenshot below illustrates the issue:

This screenshot displays the 3V3 power-up, the FPWM_GPIO11 (issue) and FPWM_GPIO12 (no issue).

We don't have the issue on our other boards so it seems to be specific to that particular device which raises concerns as this is not something we would expect.

As this already been experienced before either by TI or by TI's customers ?

Best regards,

Clément

  • 0
    TI__Guru 60800 points

    Hi

    Yes, the small glitch is expected and this shall not cause your problem since its amplitude is too small to trigger the downstream device. 

    You can try to boost the slew rate of the VCC.

    Regards

    Yihe 

  • 0 in reply to yihe
    Expert 2426 points

    Hi Yihe,

    Can you please elaborate a bit more wrt. why it is expected ?

    Does it mean there is a constraint on the Vcc ramp up to avoid that issue ?

    There is nothing stated in the datasheet about that and we were expecting the FPWM pins to be low level during power-up, not to follow their power supplies.

    Furthermore, we are not seing this behavior on all FPWM pins.

    As a matter of fact, it does cause a problem as this signal is the SET signal of a SR flip-flop made of two NOR gates. As these NOR gates are powered by the same power supply, the glitch (500µs is more than a glitch honestly) is leading to the NOR gate output to goes high and thus setting the SR flip-flop while it's not expected at that time.

    We tried putting a 10k pull-down on the FPWM output but it did not work. We used to do that on old CMOS devices that could put a high level on their output during the early stage of the power supply ramp.

    Best regards,

    Clément

  • 0 in reply to Clément Letonnelier
    TI__Guru 60800 points

    Hi

    Did you configure the GPIO11 and GPIO12 as mix of EN and PWM function? This is not something we recommend since you may see glitch on the EN pin as described in the data sheet.

    Regards

    Yihe 

  • 0 in reply to yihe
    Expert 2426 points

    Hi,

    We are using this pins as logic controlled GPIOs.

    Best regards,

    Clément

  • 0 in reply to Clément Letonnelier
    TI__Guru 60800 points

    Hi

    I would suggest increasing the VCC slew rate to 4V/ms to see whether the issue can be minimized.

    Regards

    Yihe

  • 0 in reply to yihe
    Expert 2426 points

    Hello Yihe,

    Why are you suggesting 4V/ms ? Is this encountered behavior expected at slower ramp values ?

    The datasheet only states a requirement of 0.25V/ms minimum between 2.3V and 2.9V.

    Unfortunately we are generating the 3.3V supply from a LMR36503MSC3-Q1 which has a fixed soft start value.

    Regards,

    Clément

  • 0 in reply to Clément Letonnelier
    TI__Guru 60800 points

    Hi

    Can you make the slew rate faster just for a experiment?

    Regards

    Yihe

  • 0 in reply to yihe
    Expert 2426 points

    Hi,

    No we can't do that on that board due to planning constraint.

    You did not answer to my previous question.

    Why are you suggesting 4V/ms ? Is this encountered behavior expected at slower ramp values ?

    Best regards,

    Clément

  • 0 in reply to Clément Letonnelier
    TI__Guru 60800 points

    Hi

    We suspected the slow slew rate of VCC causing racing condition of internal LDO to turn on the buffer.

    That's why we suggest you to increase, you can use external power to test with modifying the EVM.

    Could you send the sch and configuration file?

    Regards

    Yihe

  • 0 in reply to yihe
    Expert 2426 points

    Yihe,

    I am not sure that checking on the EVM would help, we have not been experiencing this on all of our boards (but there certainly a small difference in the slew rate on each individual board) so we might not see anything.

    Also, our VCC slew rate is compliant with the datasheet...

    I could send you the sch and configuration file considering there is a NDA between both of our companies but not through the forum.

    Should I send it to our FAE and let him forward them to you ?

    Regards,

    Clément

  • 0 in reply to Clément Letonnelier
    TI__Guru 60800 points

    Hi

    You can check EVM with different units. 

    Please send with FAE.

    Regards

    yihe