I increased the HS shut down resistor, why can I also reduce SW ringing.IS SW ring be related to the High side Mosfet shutdown speed?
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I increased the HS shut down resistor, why can I also reduce SW ringing.IS SW ring be related to the High side Mosfet shutdown speed?
Hi Cassius,
Please post a picture of your schematic, I/O values, load, and any relevant waveforms.
Thanks
Hi Cassius,
Take a look at these app notes for more detail on switch-node ringing:
What's critical is the input cap placement (relative to the FETs) to minimize the power-loop parasitic inductance.
Regards,
Tim
Hi Cassius,
If you're talking about leading edge ringing (on the rising edge of the SW voltage), then it should relate to the HO turn-on resistor. The HO off resistor sets the turn-off rate.
Note you can set the low-side gate resistors to 0Ω (especially the LO turn on resistor). What FETs are you using here?
FYI, I attached a high-density 2.1MHz design here with particularly low switch ringing. Note the capacitor placement on slide 7 (both 1210 and 0402) and layer stackup shown in slide 21.
Regards,
Tim