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TPS6593-Q1: I2C Address Setting

Sanel Hirkic
Intellectual 1520 points
Part Number: TPS6593-Q1

Question 1: https://www.ti.com/lit/ug/slvuc24/slvuc24.pdf?ts=1691005550099 states that GPIO3 needs to be grounded to set I2C or SPI communication on the part. What happens if this pin is floating? If we hold the pin grounded during startup but release afterwards, will it set the PMIC into I2C mode?

Question 2: If GPIO 10 is temporarily grounded on startup, then left floating after, will the device configure the NVM register to 0x28? If the pin is floating will the device address float back and forth between 0x28 and 0x2C?

  • 0
    TI__Mastermind 20277 points

    Hallo Sanel,

    please allow us some time to look into these questions.

    BR,

    Nicholas

  • 0 in reply to Nicholas McNamara
    TI__Mastermind 20277 points

    Following up on this.

    Hello Sanel,

    Sanel Hirkic said:
    Question 1: https://www.ti.com/lit/ug/slvuc24/slvuc24.pdf?ts=1691005550099 states that GPIO3 needs to be grounded to set I2C or SPI communication on the part. What happens if this pin is floating? If we hold the pin grounded during startup but release afterwards, will it set the PMIC into I2C mode?

    If enable is high, and GPIO3 is grounded on startup and then released, on the EVM it will trigger the PMIC from the default I2C mode into the SPI mode as it will see a rising edge while in the Active state.

    If enable is high and GPIO3 is floating on start up you will have trouble connecting.

    Sanel Hirkic said:
    Question 2: If GPIO 10 is temporarily grounded on startup, then left floating after, will the device configure the NVM register to 0x28? If the pin is floating will the device address float back and forth between 0x28 and 0x2C?

    If enable is high, and GPIO10 is grounded on start up, then left floating, it will initially (when grounded) be 0x28, but when left floating the PMIC may see a rise and transition to the 0x2C for the device address. When tested with the EVM in the user guide it does pull it to 0x28.

    All of the changes on the GPIO pins are when the device has the enable high.

    To avoid these it is recommended to keep the GPIO pins logic low or high prior to pulling the enable high, and raise enable high.

    Then pulling the appropriate pins to their respective signals to see a rising or falling signal.

    I hope this helps,

    Nicholas

  • 0 in reply to Nicholas McNamara
    TI__Intellectual 1520 points

    Understood. Are these pins only required to be pulled up/down during "blank" TI programming? In other words, are they are available for use as GPIO pins (e.g. enables and power goods) post programming with an image? For example, if a customer programs the board with thier our own image, do those PMIC GPIO have to be configured a certain way to maintain I2C with no CRC and I2C address 0x28 or 0x2C. During board bringup there may be a need to reprogram the sequence in case there are bugs/anomalies that need adjustment of the NVM.

  • 0 in reply to Sanel Hirkic
    TI__Mastermind 20277 points

    Hello Sanel,

    Sanel Hirkic said:
    Understood. Are these pins only required to be pulled up/down during "blank" TI programming? In other words, are they are available for use as GPIO pins (e.g. enables and power goods) post programming with an image?

    yes they are, although once power cycled after programming these will be able to function as programmed. As soon as the NVM is loaded into the device and goes from the FSM to user defined PFSM these pins are available for such.

    Sanel Hirkic said:
    For example, if a customer programs the board with thier our own image, do those PMIC GPIO have to be configured a certain way to maintain I2C with no CRC and I2C address 0x28 or 0x2C. During board bringup there may be a need to reprogram the sequence in case there are bugs/anomalies that need adjustment of the NVM.

    No, normally CRC & I2C addressing is a setting only available as an NVM configuration and can not be configured at runtime, the only way they are available as a "blank" option is as a trigger in the PFSM.

    Best regards,

    Nicholas