BQ77910 with series FET for DSG and CHG

There will likely be several application notes on the bq77910, butnothing is published yet. Figure 11 in the bq77910 datasheet provides the basic circuit. The EVM has patterns to modify the parallel board to a series circuit.  Most simply, remove Q7 and install an appropriate FET (with heatsink if needed) at Q4.  The PACK- now comes from the CHG- terminal, the DSG- terminal should not be used.  The D10 fly-back diode and ESD caps related to the DSG- path can be removed. Transient protection is more of a concern with series FETs since the charge output driver is exposed to the system transients, these seem to be worst on OCD or SCD protection. You will need to be sure to implement a protection system appropriate for your design to prevent reverse voltage on the IC at the transient.  Also the simple EVM circuit allows the BAT pin voltage to rise quickly and can shut down the part requiring charge detection to wake up again.

From a protection standpoint, the part does not care if it is charging or discharging, it has all protections active.  However it uses CHGST to determine a charge indication for mode settings and fault recovery.  CHGST also wakes up the part. The typical application of the part like the datasheet figure 11 is that CHGST would be controlled by some resistive divider to the charge+ in the charger. The device has mode control settings to for example to turn off temp sensing during charge to allow sharing the thermistor with the charger.

If you are implementing a 2 terminal battery,  you would have to give up some features.  Table 2 on page 21 of the datasheet summarizes fault and recovery conditions and will help determine the effects of your chosen design.  For example if you tie CHGST high at all times, the part could not recover from a Short Circuit in Charge fault should one ever occur since its recovery condition is charger removal. Shutdown would also not be possible.  Some modes to control the temperature sensing based on charge will not be useful with a 2 terminal implementation. Balancing control would need to be based on the voltage trigger and timeout only if used. These compromises are not specific to the series FET configuration, but the 2 terminal pack.

To keep the ability to shut down and wake the pack with a 2 terminal design, you will need some way to control CHGST from the 2 power terminals. Possibly one of the simplest ways is to use 2 signal transistors to detect a PACK voltage greater than the battery voltage and switch a voltage to the CHGST pin. When the FETs close, the PACK to battery voltage difference goes away and the CHGST signal will turn off. If you are charging from an under-voltage state, the device will repeatedly wake and sleep slowing the charge until the UV recovers.  There may be other effects depending on your exact implementation. Certainly there are other implementations possible with comparators, timers or other circuits.

Thanks for the fast and detailed reply,

It kind of what I have figured myself,

I guess the easiest way for me will be to use a parallel connection after all :-)