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TPS6594-Q1: When configuring PMIC again after the TDA4VM reset, PMIC ESM failed to be enabled.

Part Number: TPS6594-Q1
Other Parts Discussed in Thread: TDA4VM

We have enabled the TDA4VM MCU ESM and PMIC ESM.When the event mapped to error pin occurs, MCU_SAFETY_ERRZ pin(error pin) and EN_DRV signal are getting low at 0s.After the PMIC ESM delay-1 +delay-2 time, the MCU resets and configures PMIC again.However the MCU sets bit ENABLE_DRV to 1 failed and when MCU_SAFETY_ERRZ pin(error pin) is getting low again, the MCU will not reset anymore.

We read the PMIC relevant register and find some interrupt status bits(0x6C) after MCU reset.We check the manual that to clear the interrupt status bits,just write 1.However, W1C and read the interrupt status bits back, we find that it is not actually cleared.How can we clear these interrupt status bits(0x6C) and enable the PMIC ESM again.

  • I tried to mimic the your actions on a PMIC EVM, but I did not get the same results.

    1. Apply VCCA power and set ENABLE pin HIGH
    2. Set NSLEEP1 and NSLEEP2 bits both HIGH by writing 0x03 to register 0x086
    3. Clear the BIST_PASS_INT and ENABLE_INT interrupts, along with any other lingering interrupts. The PMIC nINT pin was high at this point.
    4. Unmasked ESM_MCU_RST_INT
    5. Disabled the Watchdog (only because I do not have a processor attached to do the Q and A handling)
    6. Set ESM_MCU_EN=1 and ESM_MCU_MODE=0
    7. Start ESM MCU by setting ESM_MCU_START=1
    8. Set EN_DRV high by setting ENABLE_DRV=1.

    At this point EN_DRV pin is high. Then I forced GPIO7 low temporarily by placing then removing a jumper to ground. EN_DRV goes low and PMIC nINT pin goes low as well. I am able to clear the ESM_MCU_RST_INT by writing 1 to that bit. I can then set EN_DRV high again by repeating steps 7 and 8. 

  • Resolved through FAE. 

    Root cause of issue: I2C1 CRC was enabled and command to clear ESM_MCU_RST_INT did not include CRC. Therefore PMIC ignored command.