• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 256 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65987D: TPS65987D: reset de-assert to normal operation

Javier Carrasco
Prodigy 50 points
Part Number: TPS65987D

Hello, I would like to know the delay between the HRESET de-assertion and the point where the TPS65987D is ready for normal operation. I have not found this value in the datasheets, but I might have overlooked some application note where the timing is mentioned.

Thank you and best regards,

Javier

  • 0
    TI__Genius 12855 points

    Hi Javier,

    The HRESET Hardware Reset pin of the TPS65987D is active high and the hardware reset is triggered by the rising edge. When the pin is de-asserted should not be relevant. 

    There is no exact timing for how long it takes between rising edge of HRESET pin and when the TPS65987D is ready for normal operation. This depends on many things such as how large your configuration is that will be loaded during boot-up. The best way to determine this timing is to test it out on your board/system.

    Best,

    Alex

  • 0 in reply to Alex Liu
    Prodigy 50 points

    Thank your for your prompt reply. I still do not get how the HRESET should be handled though. If the reset is triggered by the rising edge but it is active high, should it not be de-asserted to start normal operation or even to load the configuration? Otherwise the device might be in normal operation while HRESET is high, no matter how long it takes the device to get ready, which would make the pin de-assertion pointless until a new rising edge wants to be generated.

  • 0 in reply to Javier Carrasco
    Prodigy 50 points

    and the question that follows this reasoning is how can I then accurately measure the time the device needs until it is completely ready if it is not constant? The Linux driver I am using needs to register the device via i2c and I would need to know when the device is ready after a reset.

  • 0 in reply to Javier Carrasco
    TI__Genius 12855 points

    Hi Javier,

    I stand corrected on this. The HRESET pin is level based not edge based. As long as the HRESET pin is pulled high, the PD will stay in a reset state. However, it will still take anywhere from a couple milliseconds to hundreds of milliseconds before the reset is complete, depending on several factors including the configuration. 

    You have a few options that I can see:

    1.) Poll the 0x03 Mode Register (4 bytes) until it reads ' APP'. APP mode is entered when the PD is booted up. Otherwise this will read 'BOOT' or 'PTCH'.

    2.) Use the PatchLoaded interrupt to notify the MCU/EC when a patch is loaded during boot and PD mode is APP. Set the PatchLoaded bit in the IntMask register if you wish to use this.

    2.) Wait 800ms to 1s delay before registering the PD via I2C.

    Please let me know if you have additional questions.

    Best,

    Alex