Hello.
I understand that the external FET used in the TPS23525 for OR-ing operation is used to control the FET current by the gate-to-drain voltage, with the current flowing from the source to the drain. However, Power MOSFETs usually have an asymmetric drain-source structure, and the datasheet does not assume a case where current flows from the drain to the source, and the ON resistance, Vgs-Id (Vgd-Is?) characteristics, and Gm are not specified. Please advise me how I should consider the FET characteristics for this kind of reverse usage in general.