UCC28180EVM-573: Negative peaks below -0.3V at gate drive output

Ari Kilpelä

Part Number: UCC28180EVM-573
Other Parts Discussed in Thread: UCC28180, UCC28070A

Hi,

I am wondering, if the UCC28180 circuit tolerates short negative peaks below -0.3V, measured at gate drive output. We have measured such peaks, even ~-2 V, originated from oscillation on the trailing edge (gate drive shown in green, FET drain shown in yellow, output voltage shown in blue). There was a resistive load on the EVM-573 board, ~350W).

The peaks are short, maybe about 10 ns in FWHM. Some TI gate driver circuits have lower allowed negative values allowed for short peaks, < 200 ns.

Is it the same with UCC28180 ? The measurements were done with a Keysight DSOS104A- oscilloscope and Keysight N2791A 25 MHz differential probes.

over 1 year ago

0 Jonathan Wong over 1 year ago

TI__Expert 8550 points

Hello Ari,

Negative peaks of -2V is quite substantial, even if they are short. I will get back to you on if the UCC28180 can handle these short peaks. The fact that the output voltage looks stable is promising.

In the meantime, you can reduce the negative peak loads by following this design guide: https://www.ti.com/lit/an/slua939/slua939.pdf. The design guide utilizes the UCC28070A, which is an interleaved PFC, so the concepts will be the same for the UCC28180.

Regards,

Jonathan Wong

0 Jonathan Wong over 1 year ago in reply to Jonathan Wong

TI__Expert 8550 points

Hello Ari,

Unfortunately, we do not know if the UCC28180 can handle peaks of -2V as that has not been measured. We will have to go with the -0.3V limit in the datasheet.

However, please verify that the negative spikes are indeed present and not an artifact of probing. Here are some steps you can take to ensure the peaks are present:

Make sure the probe is properly compensated so that it has no edge peaking or ramping: https://www.rohde-schwarz.com/us/products/test-and-measurement/essentials-test-equipment/digital-oscilloscopes/understanding-probe-compensation_254520.html
Make sure to use tip & barrel probing to avoid picking up switching noise from the GND pigtail: https://www.cui.com/blog/how-to-measure-ripple-and-transient-in-power-supplies
Determine if differential probe is being influenced by the high voltage swing of the PFC FET nearby. Connect the diff-probe + and – to the same GND point as when measuring the GATE voltage. Dress the probes wires in the same manner as if + was on GATE, so the loop area is the same. If there are bumps in the waveform (which should be all GND) that correspond with the switching edges of the FET, then the probe is adding noise or disturbance to the GATE signal and this noise should be discounted.

Regards,

Jonathan Wong

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UCC28180EVM-573: Negative peaks below -0.3V at gate drive output