LP87745-Q1: NRSTOUT restart

Hello Siyuan,

due to the amount of traffic on the forums the team will reach back to you on this post, but make no mistake our team will be looking into this matter for you.

BR,

Nicholas

Hi Siyuan,

could I get the full LP87745-Q1 part number to help with this debug? I also would like to have the full schematic to see what 3V3_MMIC rail is and what else is connected to the rails. 

When uninstalling R261 do you first power LP87745-Q1 and then remove R261, or do you first remove R261 and the power the device? In other words, is the NRSTOUT low for five seconds at startup? 

regards,

Niko

LP877451A1RXVRQ1

3V3_MMIC connect to AWR2944 and CAN

pcba NO R261, and power on

it will be high at first, and then will turn low for few ms. and recover high for 5s, turn low for few ms,,,,,repeat this action

Thanks Nike,

but the “CS_SPI/WD_DIS” is short to GND, WD is disable？

the new information is that:

1. change SW to disable write data into flash function. NRSTOUT is OK when Vin>8V

2. NRSTOUT is still drop few ms regularly when Vin <7V

Hi Siyuan,

you should not short the CS_SPI/WD_DIS pin but pull it down with a resistor. There should also be a pull-up resistor since this is needed by the CS pin. If the pull-down is too weak, the CS_SPI/WD_DIS pin could be high (due to the pull-up) at powerup thus not disabling the watchdog.

The maximum Vin of LP877451-Q1 is 4V so using 8V input is not a suitable option.

regards,

Niko

OK, I use 390ohm pull down to GND

Sorry that Vin I mentioned is 1st BUCK INPUT. It's LM63625-Q1

Hi Siyuan,

thanks for the clarification. Could you check the voltage at the WD_DIS pin at startup. The voltage should be below 0.1V for the watchdog to be disabled. You can also disable watchdog by writing WD_EN bit to 0 during watchdog long window (should be in the long window almost all the time due to this behavior).

regards,

Niko

it's 0V at startup

we tested again that, it's easy to drop low when Vin turn on and off fastly.

Hi Niko,

I summary again, When Vin is 7V, turn off it and turn on again within 1 second. it's easy to found that the NRSTOUT will drop few ms per 5 second regularly. Which is like WD action you mentioned, but the WD_DIS is 0V at start up. 

Would you please think again that what we can do to detect and solve this issue. Thanks a lot.

BTW, Do you know the default definition of this pin, is WD disable or CS_SPI?

If it's CS_SPI, HW pull down is not works in my understanding. thanks.

Hi Siyuan,

WD_DIS function is enabled in this device. Could you share the full schematic so it would be easier for me to see what is going on? Are you sure the MCU is not enabling the watchdog?

Does this mean that you don't always get this WD long window timeout? Do you only see the NRSTOUT going low if you power off the device and within 1 second power it back again? Could you elaborate what you meant by this sentence:

siyuan.yao said:

When Vin is 7V, turn off it and turn on again within 1 second.

regards,

Niko 

MCU SW not have watchdog code. and WD_DIS is always 0V.

Seems output voltage are OK, only NRSTOUT will be low a few ms. But this will reset AWR2944, they are connectored together.

When Vin is 7V, turn off it and turn on again within 1 second. like below figure.

thanks for you support, any question please fell free to tell me.

SRR3.0_LITE_SCH.pdf

NRSTOUT as below

cycle time is 4.9s

I did a wrong action, this issue not been solved, please support me to solve this issue. TKS.

There is the schematic in attachment.

Hi Siyuan,

I am looking into this and will get back to you on Monday.

regards,

Niko

HI Niko, 

can you see the schematic and the reset figure? 4.9s/cycle

and another question: whether R261 should be installed or not on LP877451A1RXVRQ1?

If installed, there seems no NRSTOUT drop. But 5V will decrease to 2.8V. and boost stop switching.

Hi Siyuan,

have you tried removing R263? I think the WDT_DISABLE line might pull the PMIC_SPI_CS line high at startup thus enabling watchdog. Removing R263 might solve this issue.

I am not quite sure what you are doing with R261. It seems like you are connecting the output of a discrete buck (LM63625-Q1) to VIO_LDO of the LP877451-Q1, which is an output in this configuration. My understanding is that you should not populate R261.

regards,

Niko

R263 connect nothing. we tested removed it still exist issue.

Can you see my schematic in this post?

When remove R264,   NRST is coorect, no restart. 

But tested with oscilloscope, T287 KEEP 0V during startup.

PMIC_SPI_CS connect to awr2944, if remove R264, There is a 3.3V on the right pin of R264

When remove R264,   NRST is coorect, no restart. 

But tested with oscilloscope, T287 KEEP 0V during startup (With R264).

 if remove R264, There is a 3.3V on the right pin of R264

PMIC_SPI_CS is connect to awr2944,

Hi Nike，

TKS. Sorry that I wasn't explain clearly.

When uninstall R264, the MCU side is hign at start up. But if install R264, this net keep 0V always.

Hello Siyuan,

Thanks for the clarification. Nevertheless it seems like the CS_SPI/WD_DIS pin is above 0.1V during a short period of time where the state of that pin is sampled. Even 0.1V at CS_SPI/WD_DIS is enough to enable the watchdog. You said that the PMIC is functioning correctly if you remove the R264 and there is 3.3V at the AWR2944 side. This to me proves that there is high enough voltage to enable watchdog at startup.

regards,

Niko

Hi Niko,

I have a question on TI AWR2944 EVM schematic. It seems like CS_SPI/WD_DIS pin is always 0.59V(3.3V divided by 10K and 2.2K). WD can not be disable.

Would you please check whether it is true?

Or the EVM PMIC disabled WD in OTP?

Tks!

Hi Siyuan,

this question should be submitted in the radar forums since this is considering the functionality of the AWR2944 EVM.

regards,

Niko