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TPS6593x-Q1 resistance on nRSTOUT

The FS Manual mentions  SA_32] “The MCU and the SoC have a pull-down resistance on their reset input pins connected to the (?)”

We have configured the PMIC nRSTOUT as open drain which requires a pull-up resistance. Is it OK to deviate from this assumption, e.g. because nINT is connected as well and evaluated by the SoC?

  • Hello Andreas,

    as per this question and the other regarding pull-down resistance on the SoC side, let me check in the with the team in order to best answer this question.

    BR,

    Nicholas

  • Hello Andreas,

    please note that if you use nRSTOUT as an open drain with external pull-up, the  nRSTOUT signal line will be stuck-at-high if the nRSTOUT pin of the PMIC has an open-connection due to a random fault. If the nRSTOUT would have its internal pull-up (instead of the external pull-up), the nRSTOUT signal line would during such a open-pin fault inheretly be low if SA_32 would be adhered to.

    The FMEDA of TPS6593x PMIC has the "nRSTOUT: pin open" declared as failure mode (PINREF74) in tab "Pin Level Tailoring". This failure mode has been declared as not-safety relevant under the assumption that SA_32 is adhered to. So if SA_32 cannot be adhered to, you need to find another way to prevent that the system gets in an unsafe state due to the nRSTOUT line being stuck-at-high.

    If you would use the nINT as signal to be evaluated by the SoC, the question is in what state the SoC will be if the power-rails of SoC get started-up with nt nRSTOUT signal being high as soon as the IO-supply goes high. If you are sure that the SoC itself does not get in an unsafe state due to such a failure, then indeed you can use the nINT for this purpose. As an alternative, you can consider using the EN_DRV pin as enable signal for the actuators in your system.The PMIC keeps this EN_DRV pin low at startup, and only a dedicated command from the SoC (over I2C or SPI) can tell the PMIC to pull this EN_DRV pin high.

    Best regards,

    Jacco