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TPS7B85-Q1: About “Cin” in operating conditions

oaku.hiroshi
Prodigy 190 points
Part Number: TPS7B85-Q1

Hi

Regarding the input capacitance of the power supply IC, we are considering placing two 0.1uF MLCCs in series and a 1000uF electrolytic capacitor on the IN terminal line.

The data sheet states min0.1 uF, typ 1uF, and contains the following information.
(1) For robust EMI performance the minimum input capacitance is 500 nF.

Let me ask you a few questions.
①Does the above information apply to the circuit configuration of MLCC only?
(Is this a level that cannot be covered by electrolytic capacitors?)

②If ① is yes, the MLCC will be 0.05uF in the circuit currently being considered, but what kind of impact will it have if this becomes smaller? Is it okay to understand that it's just EMI performance?

  • 0
    TI__Expert 5231 points

    Hi Oaku,

    Thank you for your question.

    Usually, ceramic capacitors are used for a few reasons. One reason is due to their lower ESR rating, which makes them very effective at filtering noise. Another reason is because of their reliability. It is common for electrolytic capacitors to deteriorate overtime and have a shortened lifespan. 

    In the older devices, electrolytic capacitors were used but now mostly ceramic capacitors are being used. Please make sure to take note of the recommended ESR. 

    If you use a lower capacitor than is recommended there could be issues like stability, transient response, and more. It is best to stick within the recommended operating conditions.

    You can change out electrolytic for ceramic as long as you are meeting the ESR requirements for the device. This is important for stability. 

    Do you have a schematic I can view to better understand how you want to lay out these capacitors?

    Please let me know if you have further questions.

    Thank you,

    Josh Nachassi 

  • 0 in reply to Josh Nachassi
    Prodigy 190 points

    Hi Josh-san

    Does this mean that Cin also has ESR requirements?
    If you have any requirements, please let us know the scope of ESR.

    I feel like the answer is more towards Cout, but please tell me the effect of lowering the capacitance to Cin than 0.5uF.
    (We have carefully designed Cout.)

  • 0 in reply to oaku.hiroshi
    TI__Expert 5231 points

    Hi Oaku-san,

    You will be fine with using an input capacitor lower than 0.5 uF as long as it is still above the minimum 0.1 uF. If you have a well-defined Cout then ESR shouldn't really be an issue. 

    I hope this helps,

    Josh Nachassi

  • 0 in reply to Josh Nachassi
    Prodigy 190 points

    Hi Josh-san

    Is it correct to understand that the electrolytic capacitor is 0.5uF or more since it is mounted in parallel?

  • +1 in reply to oaku.hiroshi
    TI__Expert 5231 points

    Hi Oaku-san,

    Yes, you can use a 0.5 uF electrolytic capacitor as input capacitor or increase that value. 

    Please let me know if you have any further questions. 

    Thank you,

    Josh Nachassi