Hi,
Please provide an answer regarding the mentioned IC.
①Is there a recommended value for CBLK? e.g. 100pF or more.
②Does the DESAT terminal need to be connected as close as possible to the SiC MOSFET drain or IGBT collector terminal of the power device package?
Regards.
Hi Ryota San,
Please see the below picture which makes it clear:
A1. It highly depends on switch and how fast do you want to detect it. The time from fault-to-shutdown depends on the charging current (ICHG) and the value of the blanking cap CBLK. If we want a faster detection time, we can reduce CBLK to an extent (order of 100pF) but making CBLK too small may increase the rate of false positives and reduce noise immunity, since this capacitor doubles as a filter against transients through the HV diode(s). By instead increasing the charging current, we can have a reasonable CBLK and still have a short blanking time.
A2. As suggested in the above image.
Best,
Pratik
