TPS92682-Q1: Support on configurate the TPS92682 on CV mode & SPI communication issue

Hi Loc, 

Our experts in China are on holiday this week.  Please expect delay in response.

Best regards,

Dave

Hi,

Thank you very much for your information.

But can you help clarify this:

Tuan Tran74 said:

On your system SCK is not this way...When it's rising the data on MOSI is changing.  The data needs to be stable when SCK is rising.  You need to correct this first to communicate with the part first.

So how can I correct this? Can you give me some suggestions? it's about my software or my hardware configuration?

Tuan Tran74 said:

You need to read FLLT1 and FLT2 registers first then set the FPINRST to 1 in the EN register to clear the fault pins

Then my sequence should be:

Read FLT -> FPINRST to 1 in the EN register -> configure all the registers ->  CHx_EN-BIT set to 1 on EN register

So there are 2 times I need to write to EN register (0x00)?

Then may I ask, for example I want to enable 2 channel. On the 1st write to EN register the value will be 0x80 and on the 2nd write to EN register the value will be 0x83?

Tuan Tran74 said:

Again, I highly recommend you getting an evaluation board and get yourself familiarize with the part as part of you development effort.

Yes, sure. I really want to do that but final decision is my customer :) ... So I'm trying first to clear all the thing at my side first while waiting

Honestly, still need your help a lot :) 

Thank you,

Loc.

Hi,

Thank you very much for your information.

I'm thinking that the SPI communicate still not correct.

I want first to confirm that the software side is ok. So Could you please help do some check here:

I'm implementing a Linux Driver to control an TPS92682.

As from the spec, I understand that it's using the SPI Mode 0. Could you please check it?

And here is my API that using the spi_write/spi_read to wirte/read via SPI:

Could you please help take a look to see if my implementation is ok?

static ssize_t tps92682_transfer(struct spi_device *spi, u16 isWrite, u16 address, u8 data)
{
	u16 spi92682cmd = 0;
	ssize_t	status;
	struct spidev_data	*spidev = spi_get_drvdata(spi);
	int ret = 0;

	mutex_lock(&spidev->buf_lock);

	// AssembleSPI command
	spi92682cmd = assembleSPICmd_682(isWrite, address, data);
	
	memset(spidev->tx_buffer, 0, bufsiz);
	memset(spidev->rx_buffer, 0, bufsiz);
	memcpy(spidev->tx_buffer, &spi92682cmd, sizeof(spi92682cmd));

	if(isWrite)
	{
		ret = spi_write(spi,spidev->tx_buffer,2);
		if (ret) {
			printk("Failed writing: %d\n", ret);
		}
	}else
	{
		ret = spi_read(spi,spidev->rx_buffer,2);
		if (ret) {
			printk("Failed reading: %d\n", ret);
		}
	}
	printk("Write/Read OK: %d\n", ret);
	mutex_unlock(&spidev->buf_lock);
	return status;
}

Here is my capture with this implement:

Now I see that that SCK is OK now. Could you confirm it?

Beside that, do you see any suspect point in this capture? I just concerns about the MISO line:

1. It should be active high, is it correct?

2. I see there are some abnormal pulse on the MISO line and the MISO keep return 0x00 all the time. Do you have any idea about this?

3. In case that the MISO line not work, when I do the write action, do it still able to write to the TPS92682?

Thank you.

Best regards,

Loc.

Hi,

Thank you.

I just inform my customer to get one evaluation board :) . Let's wait their confirmation.

About the current situation here.

May I ask some questions.

1. About the MISO line, it's keep the value 0x00 all the time? I think is abnormal, isn't it?

2. The MISO line I see in the example is keep active high but mine is low, is it mandatory? Can I configure it via software at Linux side?

3. Are there any method that I can check the the TPS92682 is working via some kind of measurement? If the SPI communicate of MOSI is OK. I think I already write some of the value to the TPS92682. I just want to confirm it's working or not with current hardware setup.

Thank you very much.

Hi,

I already have a pullup resistor here, could you check it?

But I found that the MISO line is always at low level and I think that maybe the IC still not working so even the MOSI have correct data but there is no value return.

Do you have any idea that check the device is ready? I think maybe I've do something wrong in the hardware setup and the IC still not fully power up and operation normally.

Hi,

Thank you very much for you support all the time here.

I just review the HW config and found that there are another slave on the SPI bus cause the MISO line get stuck. Just update this point and the TPS92682 work find now.

Thanks.