TPS552882-Q1: Worst Case Analysis

Hi Chul,

Thank you for reaching out on E2E.

1. We don't have such a WCA model for TPS552882-Q1.

2. May I know what kind of worst case analysis that you want to run? loop stability or steady state ripple?

The TPS552882-Q1 Pspice model is quite complicated. For each start-up simulation, it takes above 10 - 30 minutes or even longer (depends on PC).

3. Could you share the full schematic, application input voltage/output voltage/load current specifications?

It's OK to add feedforward cap/resistor in parallel with upper feedback resistor in simulation, but it's better to calculate the bode plot in advance.

Thank you for your reply.

I honestly don't know which one to look at.

However, at this point, I think it is correct to do a WCA on the loop stability since the output (14V output) and ripple are fine at normal temperature.

Please tell me how to view the loop stability with internal parameter changes and temperature changes in my current pspice model.

We have already received the HQ TEST bench results from Kim, Joey <joeykim@ti.com> on 6/15.

The report they sent to us at that time is detailed.(TI recommended feedforward resistors and capacitors through TEST).

I can't attach it due to security policy.
Please let me know your email and I will send it to you.
The current contact person for Korea TI is sumin.park@ti.com.

Hi Chul,

Thank you for the information.

Unfortunately the Spice model cannot do the WCA loop stability simulation.

Normally we will take the worst condition, such as temp, Cout, L, Vinmin, Vinmax, Iout max to check the loop stability. If the phase margin and gain margin is high enough.

For now, we need to WCA the possible parts of the powers we use.
This is because we will be submitting to our customer.

1. is there any way to do WCA by simulation or other methods under the worst conditions as mentioned above?

2. Currently, our PJT uses TI products in the following power ICs.
Are there any models of these ICs that can be simulated for WCA?

- lmr43620rs5qrperq1
- tps74550pqwdrbrq1
- TPS65131TRGERQ1

Hi Chul,

Unfortunately the Spice model cannot do the WCA loop stability simulation. You can do the bode plot test under different conditions, such as temp, Cout, L, Vinmin, Vinmax, Iout max to check the loop stability. If the phase margin and gain margin is high enough.

Sorry I don't know if the below parts can be simulated for WCA, please post a new thread for one part about this.

- lmr43620rs5qrperq1
- tps74550pqwdrbrq1
- TPS65131TRGERQ1

BRs,

Bryce

hello.

I have one more question.

In order to check the BODE PLOT of TPS55288 using PSPICE simulation, if I set the schematic like the green box in the picture below, will I be able to check the BODE PLOT?

I want to see how the BODE PLOT will change as the external resistance changes and the inductor changes.

Thank you for your help as always.

Kim Chul 

Hi Chul,

Since the model is only for transient analysis, it doesn't support bode plot simulation. You can refer to the calculation tool for bode plot change.

BRs,

Bryce