Other Parts Discussed in Thread: UCC14240EVM-052
Hi,
I try to understand the Application Note "UCC14240-Q1 Simplifies HEV, EV, Bias Supply Design for Isolated Gate Drivers" (SLUAAH0).
In chapter 7 on page 13, Equation 10 gives 3.5uF as minimal capacity for CVDD in series with CVEE.
If I put all the values into the Design Calculation Tool (Version 8) I get a minimal value of 0.967uF for CVDD (COUT2min) and minimal value of 2.9uF for CVEE (COUT3min).
Series connection of those two results in 0.725uF which is far from 3.5uF.
Equation 18 from the Application Note seems to be implemented into the Design Calculation Tool.
Ripple in the Application Note is 0.5Vpp. So I put a value of 3.333% in the Design Calculation Tool for the desired ripple percentage.
How does the Design Calculation Tool calculate the value for COUT2min?
Best regards,
Patrick