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TPS3840-Q1: Open drain output configuration

Kiran Kumar R
Intellectual 275 points
Part Number: TPS3840-Q1


Hi Team,

I am planning to use TPS3840DL16DBVRQ1 part in my design for automotive application. The purpose is to monitor the DC-DC converter output voltage and act as power good circuit. 

My voltage to be monitored is 6V and The under voltage fault should occurs when the power supply voltage drops below 5.5 V. 

I am planning to use the device as shown in the below configuration 

With R1 as 100K and R2 as 41.2K ( this will set the voltage trigger to 5.483V) 

My reset out will be connected to MCU which has 3.3V level. 

My question is, since I am using the open drain output, can I connect the external pull up on the RESET pin to 3.3V source?  or is there a constraint that it should be connected to VDD? 

Also please review is my TPS3840DL16DBVRQ1 design suits my requirement of power good. 

--

Thanks in Advance,

Kiran

  • 0
    TI__Genius 10620 points

    Hi Kiran,

    Thanks for your question!

    Your schematic seems correct to me. The connection and the resistor values seems as recommending in the datasheet. 

    You can connect the pull up resistor both ways either to VDD pin or the source as long as it is in the recommended operation condition. Please find the recommended operation condition for /Reset in below. 

    The other factor is the pull-up resistor value determines the actual VOL, the output capacitive loading, and the output leakage current (ILKG(OD)), and keep in mind the lower the pull-up resistor, the higher low level output voltage (VOL).

    I hope that helps. Let me know if you need more help

    Best Regards,

    Sila Atalar 

  • 0 in reply to Sila Atalar
    Intellectual 275 points

    Hi Sila Atalar, 

    Thanks for the Reply. 

    Considering the pull up resistor as 10K on the RESET pin connect to the 3.3V source. What will be the VOL and VOH? 

    Considering the R1 and R2 as 100K and 41.2K, My VDD will be at 1.751V considering the 6V as input. and my RESET will be pulled up to 3.3V. I believe this should not be a issue since its a open drain output. Please confirm. 

    What if my VDD drops below 1.5V which is min. recommended operating voltage? how does my RESET behaves under this condition? 

    -- 

    Thanks in Advance,

    Kiran 

  • 0 in reply to Kiran Kumar R
    TI__Genius 10620 points

    Hi Kiran,

    Whenever Vdd pin goes below the threshold voltages after propagation delay time  later, the reset will be asserted. And if your Vdd goes below Vpor then output is undefined since the device is not getting enough power. 

    I don't see any problem for the case when R1 and R2 as 100K and 41.2K, My VDD will be at 1.751V considering the 6V as input. and my RESET will be pulled up to 3.3V. You can use 10kOhm pull up resistor. 

    For better understanding I want  to quickly explain what is VOL and VOH.

    VOL – Low-level output voltage. This is the maximum voltage at the supervisor output during a logic low condition. 

    VOH – Low-level output voltage. This is the minimum voltage at the supervisor output during a logic high condition.

    if your pull-up resistor value suits for the recommended voltage and current condition for /Reset pin, Vol and Voh will be the value provided in the datasheet.

    Best Regards,

    Sila Atalar

  • 0 in reply to Sila Atalar
    Intellectual 275 points

    Hi Sila Atalar, 

    My concern here is the VDD below Vpor condition. Since the RESET is connected to different source(3.3V) and when the VDD is below the 1.5V, the output will be in undefined state and since there is a pull up to 3.3V, the RESET pin may be pulled up to 3.3V under this state. Since I am using this design for power good application, this may lead to false power good indication even when the VDD is not powered. Is there any suggestion to over come this problem? 

    --

    Thanks in Advance 

    Kiran

  • 0 in reply to Kiran Kumar R
    TI__Genius 10620 points

    Hi Kiran,

    I understand your concern, and thanks for pointing that out. Output state is not defined for under Vpor.  

    But TLV840MADL12DBVRQ1 could be a better option for you since it has smaller Vpor( max) value compared to TPS3840-Q1, and it is pin to pin with TPS3840-Q1. You just need to change voltage divider value. 

    I hope this helps!

    Best Regards,

    Sila Atalar