TPS7B83-Q1: Startup phase- high power dissipation

Fausto Garcia

Prodigy 90 points

Part Number: TPS7B83-Q1

Hello

I am observing a high peak power dissipation during startup phase of the device.

around 1W for nearly 500usec ( LDO power plot below):

Mainly this is due to the inrush current of the output capacitor.

In principle with 1W during this startup phase and @HT :

Tj = 125^oC + 1.0W * 77 ^oC/W = 202^oC, definitely out of specs.

but we are talking about a short time of period about 500us where transient thermal impedance should be considered, but this concept is not mentioned in datasheet.

Two questions:

1.- model mentions:

The following features have been modeled
# a. Start-up behaviour is modeled
# b. Line transients
# c. Load transients

so, I would expect that what I am seeing in simulation is real, correct ?

2.- is it possible for you to provide transient thermal impedance specification?

or how could I estimate Tjunction in this case ?

Thank you.

over 2 years ago

0 Juliette over 2 years ago

TI__Mastermind 18466 points

Hello Fausto,

What is your board layout?

I will forward this to the thermal team and let you know if they need any more information.

Best,

Juliette

0 Fausto Garcia over 2 years ago in reply to Juliette

Prodigy 90 points

Hello Juliette

A better estimation for Rth case to ambient in out case is 45^oC/W , so if I take Rth junction to case of datasheet as 11.5^oC/W:

Tj = 125^oC + 1.0W * 55.5 ^oC/W = 180.5^oC still above specification for max Tj.

but I guess that for 500usec of this pulse, is not the same as constant power dissipation.

At this moment I do not have PCB layout, it is concept design phase.

0 Juliette over 2 years ago in reply to Fausto Garcia

TI__Mastermind 18466 points

Hey Fausto,

Unfortunately, the thermal team cannot simulate thermals without a board layout.

That being said, thermal time constants are on the order of milliseconds, so a very fast current pulse before the current limit is engaged is not likely to heat up the component by a lot. Unless you are operating right up against the maximum junction temperature, this probably wouldn't be your main issue. However the internal bond wires can be fused at some significant amount of current. That will be our main concern, if your pulse amplitude is high enough.

With your conditions:

PD = 1W, VIN = 5V, VOUT = 3.3V

IOUT = PD/(VIN-VOUT) = 0.588A

The rated current of this device is 150mA.

Typically, wire bonds can withstand 5x or more of the nominally rated current of a device; meaning that the max allowable current for this device is 750mA for a 1ms pulse width.

600mA is below that range, so your application should not damage the LDO and will continue to perform as expected.

Referenced FAQs:

Thermal dissipation from an LDO perspective

Inrush current from an LDO perspective

Please reference this paper when completing your board design: An empirical analysis of the impact of board layout on LDO thermal performance

It is possible to reduce your theta-ja through good board design, potentially even half of what you see on the datasheet.

Best,

Juliette

0 Fausto Garcia over 2 years ago in reply to Juliette

Prodigy 90 points

Hello Juliette

According your example If maximum current for 1ms is 750mA with Vin = 5V and Vout = 3.3V, this is 1.275W max during 1ms.

But my conditions let say, are : 1W, Iout = 88mA , Vdrop = 11.4V (Vin= 14.7, Vout=3.3)

Then I could say that I am really far away from damaging the device if I am not operating at maximum junction temperature.

But I wonder what happen if I am operating at 125 celsius ambient temperature and this current pulse is a starting phase condition, meaning that initial Tjunction is 125 celsius.

0 Juliette over 2 years ago in reply to Fausto Garcia

TI__Mastermind 18466 points

Hey Fausto,

I can't say for certain if this would damage the device, but it is very possible. This may have to be a test condition for a bench measurement .

I am going to run this by a team-mate that has more experience with thermal shutdown to see what their opinion is.

Best,

Juliette

0 Fausto Garcia over 2 years ago in reply to Juliette

Prodigy 90 points

Hello Juliette

Suppose that ambient temperature is RT and device startup phase conditions are:

Inrush current= 88mA , Vdrop across LDO = 13.7V (Vin= 17 V, Vout=3.3V) -- 1.2W pulse duration 500usec

you say this device can withstand up to 5x rated current (5x150mA) for 1msec, is there some condition for voltage drop (Vin-Vout) in this case?

0 Juliette over 2 years ago in reply to Fausto Garcia

TI__Mastermind 18466 points

Hello Fausto,

From our senior engineer " the device is operating at 125C and for a fraction of time has this power dissipation, it might trigger thermal protection if it gets hotter than 150C. But I don't know if there is enough time for the LDO junction to reach 150C so it's not clear to me if this will be an issue."

Best,

Juliette

0 Fausto Garcia over 2 years ago in reply to Juliette

Prodigy 90 points

Hello Juliette

OK, one question, if I look at the Figure 6.20 of datasheet:

It means that power dissipation after the load step is applied is: (13.5 - 5) x 0.15 = 1.275 W, if Rthj-a is 77^oC/W , and if this test is performed at Tj=150^oC, this will imply that ambient temperature during the test is : Tamb = Tj - P*Rthj-a = 51.82^oC.

So, I can assume that device can dissipate 1.275W constant at least Tamb=51^oC, am I right?

0 Juliette over 2 years ago in reply to Fausto Garcia

TI__Mastermind 18466 points

Hello Fausto,

Has this board been laid out,?,

Juliette

0 Fausto Garcia over 2 years ago in reply to Juliette

Prodigy 90 points

Hello Juliette,

No, it has not.

0 Fausto Garcia over 2 years ago in reply to Fausto Garcia

Prodigy 90 points

Hello Juliette,

Sorry, just coming back to my original question,

is it possible for you to provide transient thermal impedance specification?

tks.

0 Stephen Ziel over 2 years ago in reply to Fausto Garcia

TI__Mastermind 37135 points

Hi Fausto,

Julie is OoO for the rest of this week but she will respond to your latest questions on Monday.

Thanks,

Stephen

0 Juliette over 1 year ago in reply to Stephen Ziel

TI__Mastermind 18466 points

Hey Fausto,

From our thermal team:

It is possible to simulate the transient thermal impedance, either through a Zth-JA curve or RC network.

Either way, a 500 µs pulse is unlikely to cause significant temperature rise if power dissipation is only 1 W.

We can run transient thermal simulations using the JEDEC PCB if needed, especially since the board layout won’t matter until at least 100 msec have passed.

Please let me know how you would like to move forward with your request

Best,

Juliette

0 Fausto Garcia over 1 year ago in reply to Juliette

Prodigy 90 points

Hello Juliette,

Yes, I would.

One important condition is to take into account this condition at HT.

Thank you very much.

0 Juliette over 1 year ago in reply to Fausto Garcia

TI__Mastermind 18466 points

Ok, the simulation should be ready in 1-2 weeks.

Best,

Juliette

0 Fausto Garcia over 1 year ago in reply to Juliette

Prodigy 90 points

Thank you Juliette

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TPS7B83-Q1: Startup phase- high power dissipation