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TPS65023B: Soft start current will be above the max current for the device and the inductor

Part Number: TPS65023B
Other Parts Discussed in Thread: TIDA-01480

I am using the PMIC to power an FPGA. 

Due to the large number of decoupling capacitors required on the rail the soft-start current will be above the rating of both the PMIC and the saturation current of the inductor. Please advise whether this is safe and if not how I resolve as even if I replaced the inductor with one with a higher saturation current, the soft-start current would still be ~ 3.5A

I have ~900uF on a 3V3 rail driven by DCDC3. 

  • Hi Paul,

    Typical DCDC3 output capacitance is 10uF or 22uF. As far as the TPS65023B is concerned, my advice would be to lower the capacitance value substantially. From my perspective, such a high current spike would not be desirable. There's not much that can be done from the PMIC side to mitigate this if the built in soft start isn't enough:

    Regards,

    James

  • Hi James,

    The output capacitance of the PSU itself is only 44uF. The problem is the decouplers on the FPGA that it is driving. These cannot be lowered as are required. I have copied your reference design TIDA-01480 which is specifically designed to power the Xilinx Ultrascale+ MPSoC. I am only re-creating your reference design - are you saying your reference design does not work?

    Thanks and Regards,

    Paul

  • Hi Paul,

    As long as the local capacitance isn't 900uF, this should be fine. 44uF local capacitance should not be a problem.

    As for the soft start current, the reference design is made to be a working example so I wouldn't expect the basic setup to cause issues with either the PMIC or the FPGA. I would need to know more about how you are calculating the expected soft start current.

    Regards,

    James