Hello team,
On the datasheet, it says "When doing thermal calculations it is recommended to use the worst case 200°C/W which will give a set of six vias a thermal resistance of approximately 33℃/W".
Does this mean that thermal resistance of each vias are 200℃/W, and when used with 6 vias, it would be 200℃/W / 6 = 33℃/W? Is this understanding correct?
Also I want to confirm the Junction temp of the FET calculation. Could you please check the equations below?
When current through FET was 2.7A, where FET on resistance = 33mΩ, Rθjc(bot_FET) = 5.6℃/W.
Power dissipation = 2.7A x 2.7A x 33mΩ = 0.24W
Tj(bot_FET) = 0.24W x (33℃/W + 5.6℃/W) + 50℃ = 59.264℃
Best Regards,
Kei Kuwahara
