• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 59 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS54541: Output capacitor selection- can I use ceremic?

SEN LIN
Prodigy 70 points
Part Number: TPS54541

Hi，

I am designing a buck to convert 9v~32v DC input to 4.5v. Max. load is about 20w, which means max load could reach around 4.5A.

System load of my product may be dramatically changed from <500mA to max. load so the voltage drop is most concerned. 

Currently I am worried about the output capacitor selection because I don't want to use tantalum (too expensive). But because ceramic's capacitance decreases with DC BIAS rapidly(I can see a 47uF/16V capacitor drops around 60% of its capacitance under 4.5V) which make me wonder how to fulfill the output capacitance requirement by ceramic caps.

Do you have any suggestion on this?  

Thx a lot in advance.

Brs/Sen

  • 0
    TI__Expert 3766 points

    Hi Sen,

    Thanks for your inquiry. According to the datasheet, the most stringent criteria for output capacitance is the minimum COUT for which to deal with your load transients. Otherwise the converter may run out of regulation and become unstable. You are correct where the derating of ceramic capacitors can become significant with bias, and there are several ways to deal with this approach.

    1. You can add multiple ceramic capacitors in parallel each with a certain derating with the bias, but enough to preserve your stability during load transients. The larger the capacitor physical size, ie. 0805 vs 1210, the less the derating under the same bias. In my experience ceramic capacitors are usually the ones that are expensive as they add up in numbers. With careful searching you can find specific higher quality caps that do not derate as easily, for example the one below by Murata.

    2. The solution I recommend adding an electrolytic in parallel with your ceramic capacitors as the electrolytic can have enough capacitance that does not derate. Then the ceramic capacitors in parallel can bring down the ESR on the output for minimum VOUT ripple. If cost is a priority you will need to do a cost benefit analysis between these two approaches with specific models to make a decision.

    Regards,

    Henry