TPS92682-Q1: Wrong PC detection

mustafa fathy

Part Number: TPS92682-Q1

After finishing successfully from sending write frames to initialize TPS682, We sent Read frame request to register (FLAT1) to check PC bit.

We have sent read frame periodically (20ms) in Normal Mode, but noticed that sometimes 'PC' bit was set even power supply input for the TPS is 8V.
It is confirmed by your side that the PC(Power Cycled) bit is set only when VDD rising threshold(max. 4.1V) is reached at power up.

Also after VDD reaching 10V and assume PC was detected , We sent re-init frames to the chip but Loads were flickered.

So please

1- How can we detect PC successfully?

2- Which frames should be sent after detecting PC ?

3- How to prevent Loads flickering ?

Best regards

over 1 year ago

0 fhoude over 1 year ago

TI__Mastermind 23116 points

There will be a delay on the response to this because there the responsible engineer is out of office.

0 Tuan Tran74 over 1 year ago in reply to fhoude

TI__Mastermind 18890 points

Hello,

When you have load flickering that means there is a reset due to a fault condition of some sort. Please monitor VCC with scope capture during this flickering to see if it drops in voltage that causes a fault condition. You need to verify this since the input voltage has to drop to a POR level for this BIT to set.

Thanks Tuan

0 mustafa fathy over 1 year ago in reply to Tuan Tran74

Prodigy 81 points

Hello ,

For the Normal operation (power is stable and no load flickering), reading POR bit may return 1

0 Tuan Tran74 over 1 year ago in reply to mustafa fathy

TI__Mastermind 18890 points

Hello Mustafa,

I assume you reset the PC bit upon powering up is that a correct statement? PC bit should not be returned a 1 if you have reset it and there is not POR condition.

Thanks Tuan

Power management

Power management forum

TPS92682-Q1: Wrong PC detection