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BQ27Z746: Using CHG and DSG pins as logic-level inputs for external FET driver and PACK pin

Micah Black
Prodigy 50 points
Part Number: BQ27Z746

I want to use an external FET driver with the BQ27Z746 to achieve faster switching speeds than the internal charge pump would allow, but I still want to use the internal protection functions.

The CHG pin looks like it gets discharged to VSS (Vchgoff) and the DSG pins gets discharged to PACK (Vdsgoff).

Using the CHG pin as a logic input for the external FET driver looks like it should be simple (voltage divider to the correct logic level input of the driver).

But the DSG pin's low level is PACK. If I don't need the battery sensing buffer of the Zero-Volt charging mode, can I connect the PACK pin to VSS?

  • 0
    TI__Mastermind 19061 points

    Hello Micah, 

    It is not recommended to connect PACK directly to VSS. The gauge uses the PACK pin for reverse charge protection, if the DSG pin is shorted to ground then this feature is disabled. A possible solution could be to have a local turn off circuit which can increase the turn off speed of the FETs. Please see the following screenshot below taken from the Multiple FETs with the BQ76952, BQ76942 Battery Monitors (Rev. A) document. Although this document is specifically for battery monitors, the same principle can be applied here. 

    Regards, 

    Jonny. 

  • 0 in reply to Robert
    Prodigy 50 points

    Hi Jonny,

    I need a fast turn-on speed for the FETs as well. Hence why I would like to use an external FET driver with the CHG and DSG pins as logic-level inputs to it.

    I don't need the reverse charge protection feature either.

    Am I correct in understanding that connecting PACK to VSS would not destroy the chip? Are there other features that would be disabled in addition to the reverse charge protection? I am aware of the Zero-Volt charge mode and the battery sensing buffer, but are there any other wakeup features or things like that?

    Thanks

  • 0 in reply to Micah Black
    TI__Mastermind 19061 points

    Hello Micah, 

    Yes there is a wake feature that would be disabled if you connect PACK directly to VSS. The gauge uses the PACK pin to wake from shutdown mode, so if PACK was grounded then the device would not be able to wake if shutdown is entered. 

    Regards, 

    Jonny. 

  • 0 in reply to Robert
    Prodigy 50 points

    Hi Jonny,

    If I connect PACK to a fixed voltage (say a 3V3 LDO), then I could avoid tripping the shutdown mode protection. Would this connection foil any other functions of the chip?

  • 0 in reply to Micah Black
    Prodigy 50 points

    Alternatively, if I set the Shutdown Voltage to 0V and the Shutdown Time to 10s, then the device should never enter SHUTDOWN mode. I don't care about power consumption (at least not the tens of uAs difference in shutdown mode) or the Permanent Failure mode detection in my application. If there is a case where a chip goes into SHUTDOWN mode, I can just power cycle the whole chip by turning off the power to VDD in my application.

    Section 7.6.1 of the Technical Reference Manual has this table that shows voltage-based shutdown operation:

    Am I correct in understanding that if the 'Enable' or 'Trip' status is never entered then the 'Shutdown' status will not be reached? And that power cycling a chip that is in shutdown will wake it up again?

  • 0 in reply to Micah Black
    TI__Mastermind 19061 points

    Hello Micah, 

    If the device was in shutdown mode, another way to wake up the device would be to pull the ENAB pin low. If the ENAB pin is pulled low then the device will exit out of shutdown mode. 

    Regards, 

    Jonny.