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UCC21710-Q1: Device Functional Modes, Table 8-1, Expression "Open"

Patrick Ruf
Genius 5095 points

Part Number: UCC21710-Q1
Other Parts Discussed in Thread: UCC21710, UCC21750

Hi,

In the Table 8-1 in the UCC21710-Q1 datasheet (page 30) there is "PU", "PD" and "Open" used in the VDD and VEE columns.
"PU" and "PD" are explained next to the table.

What means "Open" and what is the difference to "PD"?

Regards,
Patrick

  • 0
    TI__Genius 14180 points

    Hi Patrick,

    "Open" means the pins are left floating (not grounded or biased). With VDD left open the gate driver secondary (High voltage isolated side) would remain unpowered leaving the output also in a floating state (HI-Z). With VEE unpowered the gate driver internal logic would not be grounded properly(VEE is the internal circuits ground reference point, not COM).

    Best regards,

    Andy Robles

  • 0 in reply to Andy Robles
    Genius 5095 points

    Andy,

    Thanks for clarification of the expression "Open".
    A bit irritating is that in the datasheet the Ground Symbol is used for VEE (e.g. Figure 8-1) as well as COM (e.g. Figure 8-2).
    Maybe it would help having labeled the GND symbol in every figure.

    I'm still confused why OUTH/OUTL can be Low in the case that VCC is PU, VDD is PU and VEE is Open. And in the same case CLMPE (probably CLMPI) can be High:

    Looking into Figure 8-3 I would expect that in this case both OUTL and CLMPI is floating (HiZ) when VEE is not available/not connected (Open).
    Maybe it is a misunderstanding of "Low" and "High" (in this table) from my side.
    What is the difference of CMPI being "High" and "HiZ"? As it can only pulled (down) to VEE (Low ?) potential or left floating (HiZ).

    Regards,
    Patrick

  • 0 in reply to Patrick Ruf
    TI__Expert 6630 points

    Hi Patrick, 

    Thank you for your questions and feedback. You're right on the header - UCC21710 should have CLMPI instead of CLMPE. And I believe by "high" we indicate the input to the internal Miller Clamp FET is high, thus Miller Clamp is activated to hold the gate low. 

    Let me double check with team regarding the output behavior when VEE is open. The answer might be delayed because of the Thanksgiving holiday. I'll let you know once I get a response. 

    Thanks, 

    Vivian

  • 0 in reply to Vivian Qi
    Genius 5095 points

    Hi Vivian.

    Any news on this topic so far after having had Thanksgiving holiday?

    Regards,
    Patrick

  • 0 in reply to Patrick Ruf
    TI__Expert 8568 points

    Hi Patrick,

    Our expert is Out of Office. We'll get back to you once our expert is back which would be next week.

    Best,

    Pratik

  • +1 in reply to Patrick Ruf
    TI__Expert 6630 points

    Hello Patrick, 

    Apologize for the delay. I've confirmed with our systems engineering team, and the functional mode chart attached on our UCC21710 datasheet is incorrect - it shows the behavior of devices with CLMPE (external Miller clamp), instead of CLMPI (internal Miller clamp). Please refer to the UCC21750 datasheet attached here, this shows expected behavior of CLMPI pin. You're correct - the CLMPI pin would only have two state, low and HiZ. 

    Hope this answers your question and we'll fix the mistake in the datasheet soon. Thanks! 

    Vivian