This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS54116-Q1EVM-830: Analog ground created in power plane instead of ground plane

Part Number: TPS54116-Q1EVM-830

Hi Team,

May I check with you from the user guide onTPS54116-Q1 EVM-820  - SLVUAT4-August 2016, Page 19: Figure 22 – 

I notice that your Analog ground is created in the power plane instead of the  ground plane. Is there any reason for doing so?

Many thanks.

Best Regards,

Ernest

  • Hi Ernest,

    It may be that having the AGND plane on the GND layer would interfere with the return path of the other IC pins due to the shape of the pour, so it was decided to put the AGND cutout one layer lower with the power planes. This is an older EVM design so I'm not entirely sure if that's the reason.

    The datasheet has another layout example that you can use (Section 10.2), but the EVM version of the layout should also work.

    Regards,

    James