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UCC27201A: device damage when MPPT input 50V

Brian Li
Genius 13850 points
Part Number: UCC27201A

Hi team,

My customer is using our UCC27201A. They use MPPT voltage as flyback's input, flyback output 12V to power the UCC27201A. The UCC27201A part sch as below:

They find sometime when the MPPT input is above 50V, our UCC27201A will be damaged and output abnormal as below:

(CH1：High side MOS Vgs；CH2：5Pin（HI）；CH3：6Pin（LI）；CH4：Low side MOS Vgs)

I have asked them to check if the 12V input stable when MPPT is 50V since the max VDD is 20V.

Could you please also help check why the output is abnormal and if there's any other thing need customer to check to find the root cause of the device damage?

Thanks,

Brian

  • 0
    TI__Genius 14145 points

    Hey Brian,

    Thank you for your question regarding the UCC27201A.

    Is the voltage on VDD exceeding the 20V Abs. Max rating of this pin during this 50V input to MPPT? Could you capture of the waveforms of VDD at lower input voltages and at the 50V input to the MPPT?

    Is this 50V condition a peak or a steady-state for the flyback?

    If you are exceeding that rating of the VDD pin, then the operation after that incident cannot be guaranteed.

    Let me know what your findings of this are and if you have any further questions.

    Thank you,

    William Moore

  • 0 in reply to William Moore
    TI__Genius 13850 points

    Hi William,

    I have asked the customer to check the 12V VDD, they said it is stable.

    But the MPPT's 50V is not stable, it will have big drop down to 25V sometime.

    They wonder do we need to add a current limit resistor on the VDD?

    And they also want to know which part of our device damage will lead to this LI always high?

    Thanks,

    Brian

  • 0 in reply to Brian Li
    TI__Genius 14145 points

    Hey Brian,

    It is good that VDD is stable and yes a current limit resistor on VDD is probably a good idea. A note on that is that your start up time will be longer due to the current limit to charge up the bootstrap circuitry initially. A 1 ohm  resistor is a good place to start when selecting the VDD resistor.

    With having LI always high, LO will close the low-side FET and then when HI goes high, the high-side FET will close causing a shoot through condition. This creates a bus voltage to ground short.

    LI always high isn't a result of the gate driver being damaged, you controller is what determines that, so possibly it is being damaged which causes the shoot through and damage to the driver.

    How many units have been tested and how many were damaged? Was the driver the only thing that was damaged?

    Could you take scope plots of LO and HO because that is what the driver determines? LI and HI are determined by your controller.

    Let me know if you have any questions about this.

    Thank you,

    William Moore

  • 0 in reply to William Moore
    TI__Genius 13850 points

    Hi William,

    So sorry I sent the wrong information.

    They find the low side MOS of the damage device always high rather than LI.(You can refer to the waveform CH4 Vgs of low side MOS and HI & LI)

    Could you please kindly help check which part of our device damage will lead to this low side MOS always high?

    Thanks,

    Brian

  • 0 in reply to Brian Li
    TI__Genius 14145 points

    Hey Brian,

    With the low side output staying high, you could have damage the input stage or the output stage. To verify this, you could take resistance readings of each pin to VSS to determine where the failure has occurred.

    Is the driver the only thing that is damaged or are the FETs damaged as well? How many failures have occurred?

    Let me know if you have any questions.

    Thank you,

    William Moore