BQ76952: DSG MOSFETs Dying when doing SCD Test

Hello  Ben,

We do already have an FAQ that covers these in much detail: 

• How to debug FET failure resulting from short-circuit testing

For a small summary of the FAQ. Typically with FET failure there are few common causes for it:

1. Switching was too slow, causing FETs to burn up.
   1. Must ensure you stay within the SOA of the FET.
2. Switching was too fast, causing voltage transients that damage the FETs.
   1. Cells will have a fixed inductance. If switching is too fast the resulting voltage transient can damage the FETs.
      1. Your FET seems to be a 60-V FET, it probably would reach avalanche before reaching the ABS max of the BQ76952.
   2. I'd choose FETs that have an abs max rating of at least twice the maximum battery voltage.
3. Parasitic oscillations of parallel FETs.

Let me know if these helped.

Best Regards,

Luis Hernandez Salomon

Hi Luis, hope you had a nice holiday season.

1. The FETs in use (SIR680DP) are capable of 200A for a 100uS pulse, our SCD peak is significantly lower than this time window. If the gate voltage would continue clamping to 0 instead of stopping at ~18V then we would definitely be in the SOA of the FET.

2. We are collecting new data on PACK/BAT voltages under these conditions, this isn't the greatest plot but I already have it and it shows that the BAT+ voltage does not spike severely enough to cause any damage? Please correct if I am wrong. Like I say, we will collect new data which will be more clear. Please note the FET is the SIR680DP NOT SIR180DP, please ignore that part number on the schematic.

3. All of the data we have already provided shows no fluctuations in the voltage on the gate of the DSG FET which would rule out oscillations in my eyes?

Thanks,

Ben

Hello Ben,

In the new data, if possible it'd be great to also get the LD voltage during the event. I am curious on it. 

In my own testing of SCD protection I've seen voltage transients of almost 3 times the battery voltage when SCD turn-off speed is too fast, so do record what is happening with the transients. By the way, what protection settings do you have for this? We've suggested MOSFETs with drain-source ABS max of at least two to three times the overall stack voltage because of this. 

Some MOSFETs may be able to handle the transient better than others.

Yes I agree about it not being due to parasitic oscillations, just mentioned it as it is something that we've seen to cause failures in the past.

Best Regards,

Luis Hernandez Salomon

Luis,

We have re-run the testing to collect the data as requested, please see the plot below which is very similar to the original I sent:
You can see that this data shows that we're not having any kind of severe transients.

To make it easier, I have a separate plot here that just shows LD and Current in these scenarios:
You can see LD discharges when the protection kicks in and then sits at ~5V until "FET Death"

I have attached our config for you to look at too:

bq76952-rev6.3-test1.gg.csv

If you need any more data, please let me know.

Thanks,
Ben

Sorry Luis, I realised I should have sent the gate voltage plot at the same time. This is from the test mentioned in my most recent post:

Thanks,
Ben

Hello Ben,

It seems like the SCD condition continues for over 10-ms until FET failure. There is still a ~30-A current and the BAT voltage is very low (due to battery being shorted). Did you see the fault trigger in the registers? If the FET is turning off (Which the original images seem to show the gate-source were the same, so FET is OFF), why would there be current flowing?

Is the gate-source of the FET actually low enough to turn-off?

The voltage transient on BAT does not seem like a problem. 

Best Regards,

Luis Hernandez Salomon