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LM5176: LM5176

Design Team
Prodigy 60 points
Part Number: LM5176

Hi TI team,

Please help to review attached schematic, block diagram is attached.

Let me know if you need any further clarification.

  SCH_AE170_PDU_01.01.pdf

  • 0
    TI__Guru 58641 points

    Hi,

    thank you for using the E2E forum.

    To simplify the schematic review can you also share the Quickstart calculator (can be found on the product page) with the design parameter entered:
    https://www.ti.com/tool/download/SNVC208

    Best regards,

     Stefan

  • 0 in reply to Design Team
    TI__Guru 58641 points

    Hi,

    some comments recommendations on the Schematic:

    • add Snubber on SW1 and SW2 (can then be populated in case needed (e.g. due to EMI) without layout change)
    • Add Series Resistor into MOSFET Gate signals lines (can then be replaced in case needed (e.g. due to EMI) without layout change
    • If BIAS is not used connect to GND or VIN
    • Consider in layout separation of AGND and PGND with the connection at the Thermal Pad
    • Slope cap should be the next lower value from the Quickstart calculator - value in schematic is much lower
    • Output cap in schematic does not match value in Quickstart calculator
    • When using the output capacitance from the datasheet (3 times 47uF and assuming that this are ceramic caps - so with DC BIAS effective cap would be ~ 75uF) then the system will be not stable with phase margin of 14 Degree

    Best regards,

     Stefan

  • 0 in reply to Stefan Schauer
    Prodigy 60 points

    Hi Stefan,

    Could you please share email ID to share this schematic layout file, as I cant share this data publicly. 

  • 0 in reply to Design Team
    TI__Guru 58641 points

    Hi,

    you can use the Mail feature of this forum. Just hover the mouse over my name and select send private message.

    Please also drop a note here - so that I know to check the private message - otherwise it may get missed for several days.

    Best regards,

     Stefan

  • 0 in reply to Stefan Schauer
    TI__Guru 58641 points

    Hi,

    fortunately, I have seen that there was a Mail sent by you. As mentioned please also make a note here that a private message has been sent.

    For the layout:

    Connect Current Sense resistor with Kelvin Connection

    Make a AGND island for the LM5176 (AGND signals)
    - connect AGND and PGND via Thermal Pad
    -> Avoid high current flowing through GND at AGND area


    Q2: SW2 is return path to HDRV2 - reduce area of current loop - place both wires on top of each other or close next to each other
    Q6: better but can as well be improved


    VCC cap is quite far away from the LM5176


    Schematic:
    Schematic feedback seems not been considered so far

    Best regards,

     Stefan