LM5117: Simulation error of LM5117 in PSpice for TI

I connected GND to VCCDIS and deleted the OptiMOS model library, but the same error persists.

This is the circuit that I have up to now. I made the change of grounding VCCDIS and deleted the OptiMOS model library but the error persists.

Hello Derick 

I think you haven't deleted the library completely. Please also click the 'model libraries' folder in the window on the left side, and check if any OptiMOS MOSFET models are still linked. 

-EL

I deleted first the OptiMOS MOSFET libraries that were in the library component section and when I checked the model libraries there wasnt any OptiMOS MOSFET models. The error about the models dissapear, but now is giving me a convergence error.

Hello Derick 

Please connect the negative gate input of the switch to the SW node. And also please make it sure to click the  'Auto Convergence' option. 

-EL

Eric,

I am working with Derick on this project. if you want S2's negative input to be connected to the SW net does that mean S1's negative input needs to be connected to SW pin/net as well? Normally, if it's a MOSFET the gate voltage will be relative to the GND/RTN and I don't quite understand the logic behind connecting the "negative terminal of S2" to SW pin/net.  

Hello Nipuna

If you want S2's negative input to be connected to the SW net does that mean S1's negative input needs to be connected to SW pin/net as well ? ==> Yes. 

The negative gate connection of the low-side switch should be connected to GND. The negative gate connection of the high-side switch should be connected to SW. 

-EL 

Eric,

I don't understand why we have to connect the "gate control return" to SW net. When we eventually go and build this this "negative gate connection" doesn't even exist. we'll only have one gate control voltage  which will be connected to HO or LO based on whether it's a high side or a low side switch. This issue only comes into the picture because the MOSFET models don't work. "negative gate control" is just a reference and that reference should be ground. And that's what the LM5117 datasheet wants us to do. Can you check  LM5117 datasheet page 22 again? 

I don't think the ideal "voltage controlled swtch" is a MOSFET model. It seems to me you are connecting bulk to the source but you don't have to do it in this case since this is just an ideal switch. Anyways, can you try to model this circuit or the circuit from snva829? We are really trying to build a CCCV buck converter that we can tailor it to our application. 

Eric,

Thank you; we are going to try it now. With the same logic the low side switch should be connected to the CS pin correct?

Hey Eric,

Finally with all the changes made on the switches and the autoconvergence, the simulation appears which is very good news!!! The image of the autoconvergence helped a lot because I thought I had selected the option but didn't check mark the boxes that is why it kept giving the convergence error. Obviously, all the other images were very helpful too. Therefore, Thank you!

Now that I am able to see the graph, the Vout is almost 5V but it was suppose to be 12V according to the typical circuit on the LM5117 datasheet. I put 100miliseconds and the most that it reached was 5V. I thought maybe if I increase the time I could see that it reaches the 12V, but I tried to 200ms and the simulation doesn't get pass 70%. When I stop the simulation in 70% is still in 5V or almost 5V. 

The simulation that is in the image is of Vout which basically reached 5V in 100ms. In the image of the schematic you will see that the green probe is in Vin, but I changed that to only measure Vout. 

To give more information, the zener diodes have a value of 15V (both zener diodes) and both switches have a RON = 10m.

I also changed the green probe in the schematic to where the set of capacitors (which are next to the inductor) are to measure Vout correctly. That is the only change that I made in that image of the schematic.

Hello Derick 

Please download the example schematic at https://www.ti.com/lit/zip/snvm040 and check if this works well in your machine. If this works well, you can modify the schematic matching with what you want.

-EL

Eric,

I am seeing that you are using PSMN5R5 in your schematic (snvm040). Is this model in Pspice for TI spice models or do we have to download the model separately?

Hello Nipuna 

I am not sure in which folder the model is stored, but it works well in my machine without error. 

-EL

Eric,

I was able to download a model for PSMN5R5 and get similar results as you. One thing I realized is that you don't have 5.1K ohm and 1000 pF capacitor in between CM pin and AGND. However, it's in the datasheet schematic it's there. Can you explain why you don't need those elements?   

Understood. We are now going to simulate the snva829 which uses the current monitor.