• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 63 subscribers
  • Views 276 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A4701-EP: tps7a4701rgwr review schematic for power supply

Janus Coorevits
Prodigy 10 points
Part Number: TPS7A4701-EP

Hi,

Can someone review this schematic based on the tps7a4701rgwr for a stable 5V? There will be a 9VAC input of 50Hz coming from a transformer (230V->9V)

PowerBoardV1_2.pdf

  • 0
    TI__Genius 15125 points

    Hello,

    Thank you for your question.

    I will be reviewing your thread in the coming days.

    Best Regards,

    Hannah

  • 0
    TI__Genius 15125 points

    Hello,

    Overall, the schematic looks good. I just have a couple of recommendations and questions for you:

    1) What load current is being used in your system? This will help us to better analyze the parallel LDO system.

    2) We recommend tying all NR pins to GND. Additionally, you can reduce all NR caps down to 1 to save on cost.

    3) The NC pins can be tied to GND to improve thermal performance.

    4) The SENSE/FB pins should be tied to the ballast resistor pad closest to Vout. 

    5) We recommend using an output capacitor of at least 10uF. 

    6) Finally, each LDO should have an output capacitor between the OUT pin and the ballast resistor. 

    Please let me know if you have any additional questions.

    Best Regards,

    Hannah