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LMG1210: Modelling LMG1210 in AWR / output impedance

Patrick Wegener
Prodigy 30 points
Part Number: LMG1210
Other Parts Discussed in Thread: TINA-TI

Dear TI-development team,
i am currently writing my bachelor thesis and would like to use the LMG1210 to control a switching amplifier in the half-bridge topology.

Since only AWR models are available for my choosen transistors and unfortunately not for the LMG1210, I have decided to fundamentally remodel the behaviour of the LMG1210 in AWR. However, I am still missing two details that I unfortunately cannot find in the data sheet.
I would like to know how high the impedance at the high-side driver output is in relation to the switch node (high-side driver ground) and how high the impedance at the low-side driver output is in relation to ground. I can use these values to create a more realistic model of my switching amplifier.
I would also like to ask politely if there is a graph or a table of values that shows the fall/rise times in relation to the load to be driven in nF.

I am very grateful for any advice or help!
Best regards

Patrick

  • 0
    TI__Genius 14145 points

    Hey Patrick,

    Thank you for your question regarding the LMG1210.

    For the output stages of the high-side and low-side of the driver, there is an internal pull-down FET that would connect HO to HS and LO to VSS. This internal pull-down FET's impedance would be its Rds(on) value. This can be found from the datasheet under V_OL Low-Level Output Voltage and calculate that it is 1.6 ohms based on the voltage and current listed in the table in Section 6.5 Electrical Characteristics.

    I do not have a graph or table with the exact rise and fall times of the load but we do have a calculator tool that can help you determine this. This is done with the Excel file below and is used for charge of the FETs which can be converted to capacitance.

    [FAQ] LM2105: Half-Bridge Gate Driver Minimum Current Calculator

    Let me know if there are any further questions.

    Thank you,

    William Moore

  • 0 in reply to William Moore
    Prodigy 30 points

    Hey William,
    thank you very much. That helped me a lot. I would just like to know exactly which fet model it is so that I know the parasitic capacitance Cds and can specify the reactive component of the output impedance for my remodelled driver. Can you tell me that by any chance? That would be great!

    Thank you. The "Peak Sink Current" in the data sheet corresponds to the "drive current" from the excel sheet, right?

    Thanks again,
    Patrick

  • +1 in reply to Patrick Wegener
    TI__Genius 14145 points

    Hey Patrick,

    Our internal FET for the output stage is not a discrete external device and I am not able to publicly release the information regarding that component but it would have low capacitances.

    Just to make you aware, PSpice for TI is publicly available and can be found on the LMG1210's product page along with the Unencrypted PSpice model and the TINA-TI model.

    As for the drive current from the calculation tool, that correlates to the source and sink current specifications from the driver's datasheet.

    Let me know if there are any further questions.

    Thank you,

    William Moore

  • 0 in reply to William Moore
    Prodigy 30 points

    Hey William,
    thanks for the quick reply. Yes of course, stupid of me to ask that.
    Then I have no further questions.

    Thanks again,
    Patrick