• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 3 answers
  • Subscribers 64 subscribers
  • Views 486 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMG1210: Looking for the faster gate drivers for multi-level hybrid converter PCB solution

Hua Chen
Prodigy 120 points
Part Number: LMG1210
Other Parts Discussed in Thread: LMG1205, , LMG1020

Hello, TI experts,

Is there any faster 5V (commercial TI) gate drivers than LMG1205 or LMG1210 multi-level hybrid converter PCB design? I feel like the rise/fall times and delay are over 10ns. The interest fsw range is 500kHz to 2MHz, can you suggest gate drivers which has less than 10ns or 5ns delay and fast rise and fall time?

Thanks

  • 0
    TI__Intellectual 1340 points

    Hi,


    Thanks for reaching out. Looking at the datasheet of the LMG1210 (section 6.6 Switching Characteristics) shows the following rise and fall times:

    Under most circumstances, the maximum rise and fall times should be well under that 10ns you are aiming for. While using a GaN gate driver, layout is critical and there could be a few things in a layout that can alter the performance such as the general layout, gate resistance, FET gate charges, etc.

    First, could you try replacing the LMG1210 with another one to see if the results are replicable? Let me know if there are any further questions.


    Thanks,
    Jeremiah

  • 0
    Prodigy 120 points

    Propogation delay is 10ns or higher (checking with turn-off delay and turn-on delay), prefer short delay time. Or is there any way to control it within 10ns, I saw a lot of parasitic LC ringing under scope. 

    thanks

  • 0 in reply to Hua Chen
    TI__Intellectual 1340 points

    Hi Hua,

    Parasitics commonly arise through unoptimal layout. Section 10 in the same datasheet referenced earlier provides some guidance on what guidelines to follow to reduce parasitics as much as possible.


    As for the timing specs, the propagation delay of this device is only considered to be 18ns max, so anything below 18ns (under correct operating environments) is normal for this device.

    Thanks,

    Jeremiah

  • 0 in reply to Jeremiah Vo
    Prodigy 120 points

    Hello, Jeremiah,

    1). when you mentioned preciosuly GaN gate driver, do you mean LMG1210 is a SI-mosfet gate driver for GAN power switches? GAN-based gate driver for GaN power switches? Or GAN/Si hybrid gate driver for GAN power switches?

    2). I’ll stick with LMG1210, could you provide some guidances for parasitic RLC extractions based a general layout? I would like to extract/estimate gate resistance/capacitance, trace resistance/inductance. Then, simulate the gate driver with parasitic to reduce the delay. 

    Thanks

  • 0 in reply to Hua Chen
    TI__Genius 11770 points

    Hi Hua,

    Hua Chen said:
    1). when you mentioned preciosuly GaN gate driver, do you mean LMG1210 is a SI-mosfet gate driver for GAN power switches? GAN-based gate driver for GaN power switches? Or GAN/Si hybrid gate driver for GAN power switches?

    LMG1210 is made of silicon designed to drive GaN FETs. There isn't any GaN inside the device at all. Sorry for the confusion. 

    Hua Chen said:
    2). I’ll stick with LMG1210, could you provide some guidances for parasitic RLC extractions based a general layout? I would like to extract/estimate gate resistance/capacitance, trace resistance/inductance. Then, simulate the gate driver with parasitic to reduce the delay. 

    I recommend reading "Optimizing Gate Driver Layout for LiDAR Applications". It is directed towards LiDAR, but that tends to be the end-equipment with some of the most stringent timing requirements so a lot of the information is relevant. In addition, "Optimizing multi-megahertz GaN driver design" has some LMG1210 specific information that should help. 

    In terms of parasitics, I recommend starting by drawing the turn-on and turn-off loops.

    I don't have data I can share about the bondwire inductance of LMG1210, but I would expect it to be on the order of nH or possibly lower. As you can see in this loop, the bypass capacitor loop and Gate drive loop are both important contributors. One thing that can help is using a feedthrough capacitor for lower inductance. 

    Lastly, LMG1210 is the fastest half-bridge driver in our portfolio. The only other option I see is LMG1020 + discrete isolators/level-shifting, but I am not sure I have seen someone beat LMG1210 with that kind of setup. As a BGA, LMG1020 has no bondwires and can achieve lower inductance, which helps a lot at very high frequency. 

    Thanks,

    Alex M.