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TPS2HCS10-Q1: FAULT Low to Hi-Z timing

Shinji Tsuji
Genius 14129 points
Part Number: TPS2HCS10-Q1

Hi team,

Could you please advise the exact timing when FLT pin goes from Low to Hi-Z?

I tested following on EVM. 

FLT pin turns Low to Hi-Z at #4 sequence below. 

Is this expected behavior? 

I would like to confirm that "READ CLEAR" occurs #4(MCU read out the data) or #3(MCU send read 4h command)?

(Unless data in 4h is read out, FLT pin stays Low, correct? Sending read 4h command to the device is not enough to turn FLT pin, correct?) 

1. Apply power to the device.

2. send 1 dummy command to the device to transit from SLEEP to CONFIG/ACTIVE. 

3. Send Read 4h command. SDO=03FFFF  

4. Send Read 4h command. SDO=030347   --> FLT from Low to Hi-Z

5. Send Read 4h command.  SDO=000000

regards,

  • +1
    TI__Mastermind 34935 points

    Tsuji-san

    This is the expected operation of events.

    Note that for read requests, it's not immediate that you get a result within the same SPI frame. The first read request sets up the device to take the content of the requested register into the SPI buffer for the NEXT read to happen. This means that the value that you read from #4 on your sequence is what you requested from #3 (and would fall in line with the FLT transition). 

    Best Regards,
    Tim