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UCC28064A: UCC28064AEVM

Part Number: UCC28064A
Other Parts Discussed in Thread: UCC28070, UCC3817,

Hello all!

I am new to this forum and community so firstof all thank you in advance for the help provided with regards to the following topic! Please pardon my english as it is not my native language.

Here's a bit of context for all of you, I'll try to be comprehensive and not drown you in information:

Designing an interleaved Boost power stage with active power factor compensation that is able to supply 300W nominal power for a 390V output voltage => needs to be adapted to a 400Hz/115Vrms single phase line network.

UCC28064AEVM.pdf

Well, the UCC28064AEVM works just fine for that purpose, right? Not quite as the board runs at 400Hz indeed but it needs to comply with the DO-160G requirements for a Wide Variable Frequency range (i.e 350Hz-800Hz).

I thus have made measurements using a power wattmeter (PM3000A with single phase AC+DC wiring) to visualize both the power factor and total current harmonic distorsion.

Measurements were done from H1 (fundamental frequency) through H9.

  • Triplen harmonics based on the fundamental frequency within the bandwidth have to follow the following requirements => H3 shall not exceed 5% of the fundamental ray amplitude / H9 shall not exceed ~1.67% of H1 at nominal power (i.e 300W). 
  • Power factor for leading phase correction shall be no lower than 96.8%
  • THDi must not ecxeed 10% @ nominal power

I have made a few changes from the vanilla configuration of the UCC28064AEVM board which are the following:

  • Switching noise from the coupled Boost inductors would talk with the rectified line current and line current (you were clearly able to see the usual sawtooth waveform on the "average" inductor current so I decided to add a differential mode inductor of 100µH rated @3Adc and a ceramic capacitor of 470nF to the already existing 100nF film cap). That somewhat did the trick but I knew this would affect the power factor by adding too much phase lead. Tried using a PI filter structure but that didn't do the trick, it made it worse probably because of both capacitor's and Graetz bridge's impedances (although you might argue that there is at least a little bit of trace inductance in between).

  • I noticed that the Vinac (near zero crossover sensing from the rectified line waveform) pin would sense the AC line voltage as close to the Graetz bridge output as possible but that means I needed to redirect that sense after the LC filter, which is what I did and it runs ok.

  • Note that the Boost inductors are both rated @340µH  / even though the datasheet specifies that you should use a diode offset circuit to the Vinac pin for an inductor value below 250µH as a rule of thumb. The rallying time and distrosion seen on the line current is caused by the pulse skip of the FETs when the rectified current ets close to zero in transition mode. So I still decided I would add a 3 diode (BAS316 SOD323) clamp circuit tied to the Vinac voltage divider such as to introduce an artificial gain to the Vinac pin threshold, meaning that it forces the power stage FETs to keep switching during that time window. 

  • I measured these parameters for both 115Vrms and 90Vrms, both power factor and total harmonic distorsion were better @90Vrms but efficiency lowered (92% vs 94%). H3 and H9 were much better (see attachement below that confronts both 115Vrms and 90Vrms with the changes above)
    Dataset400HzPFC.xlsx

  • I tried to change the range of the line voltage by tuning the PHB pin discrete parameters => R28 disconnected, R17 replaced by a 0R resistor / R29 => 82k and R27 => 200k (see application note schematic above). Alas, it did not really improve the results that are shown in the xlsx file.

To summerize, I changed the input on the Vinac pin and Vref pin, added an LC filter to the rectified bridge output and changed the PHB pin parameters as well. Modifying the Tset resistor did nothing except if too low introduces pulse skipping to the power stage @ light load.

I'm desperately trying to improve H9 so that it stays below 1.67% of H1 for a range of 200W to 300W. If anyone can provide a bit of insight on how I could do that from the changes I've applied I'd be so grateful and I'm keen on learning new things! 

Thank you all, don't hesitate to ask for more precisions if need be.

  • Hello,

    Generally just having PFC will pass EN61000-3-2 harmonic content.  I am no familiar with D0-160G.  However, it looks like harmonic content similar to EN61000-3-2.

    I would start with the unmodified EVM.

    Would the design pass DO-160D at 50 to 60 Hz input?

    If it does pass at 50 to 60 Hz, what is the difference between input current and line current at 350 to 800 Hz?

    Do you have waveforms that you can share?

    Regards,

  • Hello,

    Thank you for the feesback, I will look into the specifications of the  EN61000-3-2 ragarding current harmonics. I will have to get back to the initial configuartion of the board to re-run nominal power tests at 50Hz line to provide you with oscillograms and check line rms current. The only available waveform are in the xslx file but they are not representative of the initial "vanilla" configuration of the board as you have noticed. 

    Best regards,

    Clément

  • Hello,

    I looked at the waveforms and there are flats spots in the sine wave near cross over.  Even these waveforms would pass EN61000-3-2 harmonic content.

    I have to be honest that all of my PFC designs have been to meet EN61000-3-2 and were designed for 50 to 60 Hz applications.

     

    This actaully made me recall a topic at APEC presented on high frequency design for PFC.  I guess there is an issue with phase shift and cross over distortion that it makes it hard to meet Avionic specifications.  They came up with a technique call Current Phase Lead Compensation.  I searched my computer and found the APEC paper.  The research was done by Virgina Tech researches.  I have attached the paper for your reference.

    7028.5_10841.pdf

    They actually implement this technique on the UCC3817 that uses a current amplifier.  I am not sure if you can implement this technique on the UCC28064A but you could give it a try.  The UCC28070 interleaved PFC has a current amplifier so you should be able to implement on that controller.

    Regards,

  • Thank you for your help Mike O', I will look into it! Please excuse me for the delay in my response. I wish you a great day.

  • Thanks for letting me know.

    Regards,