This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD90160A: [Consultation] TI - UCD90160A (SEQUENCER) Alert pin default status is "L" when power up sequence normally be operated

Part Number: UCD90160A
Other Parts Discussed in Thread: UCD90160

Hi TI service team,

I have encountered one issue at UCD90160A PMBALERT_N pin (already pull-up to 3V SEQ VCC with 4.7K resistor) abnormal status (check below figure1) when power on system.

Can you help to check the reason why this pin is asserted even if power sequence is normally operated in the beginning (check below figure2)?

Thanks a lot.

Figure1:

Figure2:

Best Regards,

Paul Lei

  • Hi

    PMBUS_ALERT is indicator for any event that UCD see, not only for the power, but also communication. 

    Based on the snapshot, You got some I2C communication fault that's why the pin is pulled low.

    But it shall not impact sequence.

    Regards

    yihe 

  • Hi Yihe,

    I noticed the results you mentioned are related I2C communication.

    All rails are normally operated, there is only communication problem in the beginning, and I need to clear logged faults (figure1) to de-assert "PMBALERT_N" from L to H level (figure2).

    (1) Is there any default I2C/SMBus (like congenital defects) communication problem when system boot up in the beginning ?

    (2) How can I prevent from this kind of CML fault logs in UCD90160A in the beginning when rails are all ok ?

    Thanks a lot.

    Figure1:

    Figure2:

    Best Regards,

    Paul Lei

  • Hi

    1. This is most caused by the host and UCD has no control on this.

    2. This is a status and not a fault log(not in the NVM), you can issue clear status(0x03) command to clear the status. 

    Regards

    Yihe 

  • Hi Yihe,

    1. However, we have same design in other components with ALERT_N signal, SDA/SCL are all pulled-up to P3V3 which is the same voltage source to UCD90160A, and they won't assert ALERT_N signal to L, is there any other design requirements (HW / FW) in UCD90160A I haven't noticed ?

    2. OK, got it, if we have this default assertion value, host can issue clear status (0x03h) command to reset this ALERT_N to H.

    Thanks.

    Best Regards,

    Paul Lei

  • Hi

    Those kind of status is software related instead of hardware related.

    you have to debug the software. 

    Regards

    Yihe  

  • Hi Yihe,

    For debugging of software, you mean it's to fix the configuration file in UCD90160(A) or the FW setup on my system.

    However, I don't connect any host on my system in the beginning, but it still occurs CML fault in logs and causes ALERT_N pin assertion.

    Thanks.

    Best Regards,

    Paul Lei

  • HI

    I mean your host i2C software.

    Please clarify what kind of CML fault. there are many faults embedded in the CML.

    if you do not have a host, i won't expect any I2C communication on the bus. have you probed the SCL/SDA?

    Regards

    Yihe 

  • Hi Yihe,

    No, it's because that we all use same design in other IC for I2C communication, so I just wondering about whether there is default communicated issue in UCD90160(A) in the beginning.

    Thanks.

    Best Regards,

    Paul Lei

  • Hi

    No such problem in the UCD90160.

    Regards

    Yihe

  • Hi Yihe,

    Can you talk more about 03h REG, clear fault command ?

    I have seen some descriptions in datasheet (slua815b), UCD90160(A) doesn't support SMBALERT_N MASK function.

    Can you help to check with your EVBoard for this alert pin (SMBALERT_N) status after powering up ?

    Thanks.

    Best Regards,

    Paul Lei

  • Hi

    UCD90160 does not support SMBALERT_MASK but it has nothing to do with what you observed

    we do not have this issue on the EVM.

    The best is to probe the SCL/SDA during the power up.

    Regards

    Yihe

  • Hi Yihe,

    Got it and thanks.

    I'll try to investigate other devices on same I2C bus path which might affect UCD90160(A).

    One thing about fault I want to confirm again, when fault is cleared by 03h (clear fault command) to UCD90160(A), it won't let device restart, right ?

    It should be cycled UCD90160(A) power supply or applied with retry mode to restart rails again, right ?

    Thanks.

    Best Regards,

    Paul Lei

  • Hi

    No,clear fault is just to clear the status and it does not restart.

    Regards

    Yihe

  • Hi Yihe,

    Got your comments for fault clear function in UCD90160(A).

    Thanks a lot.

    Best Regards,

    Paul Lei