Hi,
In our design, we utilize the LP2989AIMX-5.0/NOPB. The Error pin of the LP2989 serves to activate the level translator (which is an active low pin) through an inverter. However, for testing purposes, I need to disable the level translator. Consequently, I want to pull down the error pin, even if the output of the LP2989 is in good condition. My question is whether the error pin functions as a gated output or an open collector pin?
