The external components of TPSM8D6C24 were calculated using the calculation tool: SLURB01 and reflected in the Webench design.
The attached Webench report shows a low phase margin.
Is it possible that it is a bug in Webench?
Or do I need to adjust both Webench's phase margin and SLURB01's calculated value to a stable value?
Best regards,
Satoshi