LP2951-N: Field Failures

Hi Phillip,

How long is the current limit test? I wouldn't expect that taking the device to current limit once for a short duration would have much (if any) affect on the device's durability, nor would I expect it to be damaged from it. 

Philip Kersey said:

The power dissipation during this test is (22V-14.4V) * (14.4V / 90 Ohms) ~= 1.2W. The ideal JA thermal impedance in the datasheet is 43.3 K/W. However, per other conversations in the forum, that is ideal and can be much worse based on layout.

I wouldn't say it is "ideal" because it is a standardized way to measure and compare devices, but the layout used in the JEDEC standard is not optimized for heat spreading or dissipation. With that said, you are correct in that the actual thermal performance can be much worse or much better depending on the board layout. Using the snippet of the LDO layout as a reference, I would expect that the thermal is probably worse than the JEDEC standard metrics reported in the datasheet, but maybe not too much worse. How many of the >12 layers are ground? The 2 large vias are probably hurting the thermal performance as well versus using a larger number of smaller vias. 

Philip Kersey said:

Is there any reason why the regulator would fail at cold temperatures (-40C) but not higher temperatures?

I don't know the specifics, but I have seen devices have trouble starting up at cold temps before, but these failures are pretty uncommon because the devices are characterized down to those cold temps so they should still function. 

Do you have any waveforms that show what the supply (22V) looks like as it comes up? What is the nature of the source (i.e. battery, rectified transformer, etc.)?

Regards,

Nick

I greatly appreciate the prompt response.

Nick Butts said:

How long is the current limit test?

It isn't defined. Normally, it would be a few seconds. However, nothing in the acceptance test prevents it from being hours. I don't have data on how long the device is left in current limiting mode.

Nick Butts said:

How many of the >12 layers are ground?

There are 6 Layers to internal ground.

Nick Butts said:

The 2 large vias are probably hurting the thermal performance as well versus using a larger number of smaller vias.

Agreed, that agrees with what the app note says.

Nick Butts said:

Do you have any waveforms that show what the supply (22V) looks like as it comes up? What is the nature of the source (i.e. battery, rectified transformer, etc.)?

I don't have waveforms of the 22V rising. I can look into gathering that waveform. But, there are 4 other LP2951CSD/NOPB ICs nearby on the same 22V bus that will operate ok. Usually only one of the regulators go bad at a time. The 22V bus is the rectified bus on the output of a DC DC converter. So, we know that 22V is present based on the other linear regulators operating.

Do you have any thoughts as to what could be causing the field failures? We've actually had these failures for over a decade, but need to figure out a solution.

Hi Phillip,

Philip Kersey said:

It isn't defined. Normally, it would be a few seconds. However, nothing in the acceptance test prevents it from being hours. I don't have data on how long the device is left in current limiting mode.

Even the order of seconds seems pretty long to me since the device will limit the current in somewhere around 1ms, but if it was put into current limit for hours (I think you were just making a point and not suggesting that it is this) this could be a concern. If it were a few seconds I still wouldn't expect it to degrade life expectancy significantly. 

Philip Kersey said:

There are 6 Layers to internal ground.

There should be pretty decent heatsinking in that case, so I wouldn't expect the thermal performance to be very different from the metrics in the datasheet. If I were to guess without seeing the rest of the board layout, I would think the actual RΩJA is within ±20% of the datasheet metrics. 

Philip Kersey said:

But, there are 4 other LP2951CSD/NOPB ICs nearby on the same 22V bus that will operate ok. Usually only one of the regulators go bad at a time.

Is it always the same instance that fails or is it roughly random?

How long are the devices in the field before the failures are detected? 

I'm guessing that you don't have any data on the conditions when the failure happens - I would think that you only get the units back once they have experienced a failure in the field. For this reason it may be difficult to troubleshoot an issue like this without having an FA done on it, which requires a return to be submitted.

Regards,

Nick

Nick Butts said:

but if it was put into current limit for hours (I think you were just making a point and not suggesting that it is this) this could be a concern

Correct. At the moment, there is just nothing preventing that from happening.

Nick Butts said:

If it were a few seconds I still wouldn't expect it to degrade life expectancy significantly. 

Ok, I will look into this and try to determine how long the regulator is tested like this on average. I would say it would at a minimum be on the order of seconds, maybe 10's of seconds.

Nick Butts said:

I would think the actual RΩJA is within ±20% of the datasheet metrics

Perfect, thank you. I'll just assume +20% (52K/W) for now. In normal operation that would give a rise of 30mA * (22V-18V)  * 52K/W == 6.24K, which looks to be insignificant. At ATP, the rise would be ~1.2W * 52K/W == 62.4K at an ambient temperature around 40C. So, the junction temperature would still be fairly far away from +150C.

Nick Butts said:

Is it always the same instance that fails or is it roughly random?

It is roughly random.  They are all powered by the same bus and located in the same general area.

Nick Butts said:

How long are the devices in the field before the failures are detected?

On average, roughly 418 hours. On the low side, the temperature may be -40C, on the high side, the ambient environment of the part could be ~+70C. Per the reliability data, the FIT rate is 2.2 per billion hours. I haven't converted that to our temperature range, but I would think we are overstressing it somehow. https://www.ti.com/quality-reliability-packaging-download/report?opn=LP2951CSD/NOPB

Nick Butts said:

I'm guessing that you don't have any data on the conditions when the failure happens - I would think that you only get the units back once they have experienced a failure in the field.

Kind of. There are those returns that come back and the regulator has obviously failed. There are many instances, however, where it works sometimes. For example, right now we are testing a unit where the regulator generally works, but at or around -40C, it doesn't rise to its correct voltage.

Nick Butts said:

without having an FA done on it, which requires a return to be submitted.

Is this something that could be done? Would you be able to gain more information if we sent in a completely failed regulator and one of these that fails at cold temperature?

Hi Philip,

Philip Kersey said:

Perfect, thank you. I'll just assume +20% (52K/W) for now. In normal operation that would give a rise of 30mA * (22V-18V)  * 52K/W == 6.24K, which looks to be insignificant. At ATP, the rise would be ~1.2W * 52K/W == 62.4K at an ambient temperature around 40C. So, the junction temperature would still be fairly far away from +150C.

Yeah, thermals don't seem to be much of a concern. 

Philip Kersey said:

On average, roughly 418 hours. On the low side, the temperature may be -40C, on the high side, the ambient environment of the part could be ~+70C.

That is a pretty short lifetime to be failing. How often would you say the ambient temperature is varying across most of the temperature range? Maybe that's not easy to estimate.

Philip Kersey said:

Is this something that could be done? Would you be able to gain more information if we sent in a completely failed regulator and one of these that fails at cold temperature?

In the best case, the FA can determine the point of failure at the silicon level. Sometimes it's not possible, but I've seen good results before. If you want to go this route, I can point you to the returns page.

Regards,

Nick

Nick Butts said:

How often would you say the ambient temperature is varying across most of the temperature range?

Unfortunately, we don't have any temperature data during the life of the product. I would guess ~40C on average but I don't know. We do put the circuit through thermal cycling where the circuit itself is exposed to -40C and ~+70C multiple times.

As an additional data point for a part that is working well, it takes ~30ms for it to get to its set voltage when soaked at -40C for an hour. For a part that sometimes fails, when it does get to the set voltage, it takes ~70ms when soaked at -40C for an hour. So, it seems like the parts that fail intermittently

Nick Butts said:

I can point you to the returns page

Do we follow this process? www.ti.com/.../customer-returns.html

Gotcha. Yeah, with the information that you have it will be difficult to troubleshoot this any further without doing an FA. You are correct with the link you mentioned. 

One follow up questions, is there a correlation between the current limit magnitude and temperature? For example, at cold temperatures does the current limit decrease and increase at warmer temperatures? It appears that the spice models to not have anything like that modeled, and I didn't see it in the datasheet.

There will generally be a temperature dependence on the current limit for an individual device. It is often the case that the current limit is higher at higher temperatures, but that is not always true across different devices since there is a variety of technology processes and designs that affect the temperature dependence. Here's an example from the TPS709 datasheet, where you can see that the temperature dependence trend depends on other factors as well:

The LP2951-N is fabricated on a much older technology node, and will certainly have a different temperature dependence curve. Guessing what it would look like is not trivial. 

You are correct in that the PSPICE models do not have temperature dependence modeled. We are aware of the shortcomings of our LDO PSPICE models, and are working on a new architecture to succeed the old one.

Regards,

Nick

In the datasheet, in the Absolute Maximum Ratings, it says that the Power Dissipation is internally limited.

There is a note about thermal regulation, where it is defined using a 1.25W pulse.

Is the internal power limit 1.25W? I understand there are limitations to the spice model, but I want to make sure that I understand

In the spice model, if there is excessive load, the regulator will output 160mA, seemingly no matter what. However, In the lab, when the output voltage gets stuck at ~5V, the output current is ~60mA. (22V-5V) * ~60mA = 1.02W ~=1.25W.

I think we understand the problem a little bit better now. The load primarily consists of a small DC DC SMPS without an under voltage lockout. Our present leading theory is that at power on, the LP2951 regulator is supplied with 22V and the output voltage starts to rise. Once it reaches ~7V, the load SMPS tries to startup, pulling more current. The output voltage of the LP2951 is pulled down as a result, which results in more power dissipation in the LP2951. If the DC DC converter is unable to pull enough current to reach steady state, everything remains stuck.

I'm trying to replicate in simulation, but if the LP2951 can always supply 160mA, the voltage always seems to come up. But, if in reality the current output decreases to limit the power dissipation in the LP2951, it could describe what we are seeing.

Hi Philip,

As far as I can tell from the datasheet, there isn't a true power dissipation limit. To me the language reads as describing thermal shutdown at a given junction temperature similar to thermal shutdown in modern devices. I couldn't find any other place that mentions limiting power to a particular amount. The thermal regulation spec that you pointed out is (I think) just referring to the output voltage deviation expected vs. temperature. In more modern datasheets this isn't a separate spec, but rather is included in the load/line transient specs.

Philip Kersey said:

However, In the lab, when the output voltage gets stuck at ~5V, the output current is ~60mA. (22V-5V) * ~60mA = 1.02W ~=1.25W.

Can you explain what you mean by "stuck at ~5V"? Does the output not fall lower than 5V when you decrease the load resistance? How did you measure the output voltage? Were you looking on an oscilloscope or did you use a DMM?

Philip Kersey said:

I think we understand the problem a little bit better now. The load primarily consists of a small DC DC SMPS without an under voltage lockout. Our present leading theory is that at power on, the LP2951 regulator is supplied with 22V and the output voltage starts to rise. Once it reaches ~7V, the load SMPS tries to startup, pulling more current. The output voltage of the LP2951 is pulled down as a result, which results in more power dissipation in the LP2951. If the DC DC converter is unable to pull enough current to reach steady state, everything remains stuck.

Can you capture a 'scope shot showing this behavior? It sounds like a reasonable theory as I have seen this type of thing happen before. 

Philip Kersey said:

I'm trying to replicate in simulation, but if the LP2951 can always supply 160mA, the voltage always seems to come up. But, if in reality the current output decreases to limit the power dissipation in the LP2951, it could describe what we are seeing.

I don't think the PSPICE model is going to be reliable for this kind of test. Dynamic performance is not modeled well enough.

Regards,

Nick

Nick Butts said:

As far as I can tell from the datasheet, there isn't a true power dissipation limit.

Ok, I agree with your interpretation of the datasheet. I'll verify soon with the EVAL board.

Nick Butts said:

describing thermal shutdown at a given junction temperature similar to thermal shutdown in modern devices.

This condition only (usually) happens after a soak at -40C. So, I would think getting to the thermal limit would be less likely. Though, at least in our configuration, with a resistive load, the current limit decreases by ~10mA from ~165mA at +55C to ~155mA at -40C, so maybe that is a factor.

Nick Butts said:

Can you explain what you mean by "stuck at ~5V"? Does the output not fall lower than 5V when you decrease the load resistance? How did you measure the output voltage? Were you looking on an oscilloscope or did you use a DMM?

The only signal that I have access to is the output of the regulator, which is set for 18V, and works most of the time. The input is 22V. There are other devices on the 22V bus that require 22V, so we know that the input is indeed getting to where it needs to be.

The primary load to the regulator is a SMPS with a 5V output. Notice in the scope plot below that once the output of the LP2951 rises above 5V, it dips, which I interpret as the downstream SMPS trying to start. In the plot below, the output of the LP2951 can no longer get to >5V. Since the output of the SMPS is set to 5V, and its input (the output of the LP2951) does not go above 5V, the SMPS will try to continue to start, but the LP2951 just can't provide the current.

What I don't understand though, is why does the current only reach ~65mA? I would think it would be ~160mA. If it is hitting a thermal limit, why does it happen at -40C, but not +55C. Perhaps because there is more current at +55C, so it doesn't stay stuck for as long? At -40C in this condition, the power dissipation in this stuck condition is ~(22V-5V) * 65mA = 1.1W. It seems if we are soaking at -40C for a long time prior to start, this wouldn't reach the +150C junction limit correct?

I have the EVAL board now, which I can get more data with soon.

Hi Philip,

Philip Kersey said:

This condition only (usually) happens after a soak at -40C. So, I would think getting to the thermal limit would be less likely. Though, at least in our configuration, with a resistive load, the current limit decreases by ~10mA from ~165mA at +55C to ~155mA at -40C, so maybe that is a factor.

For this I was referring to the thermal regulation spec in the datasheet, and not necessarily what you are seeing in your failed devices. I agree that at -40C thermal shutdown is very unlikely. It's expected that the current limit shifts with temperature (especially with older devices like this one), but I would never expect the current limit to shift below the specified max current of the device, so to me it seems unlikely that it's hitting current limit at 65mA. When you can get measurements on your eval board it would be illuminating to see the DC/DC output as well, because on the waveform you provided it does not look like the DC/DC is trying to start up over and over because in that case I would expect to see repeated dips on the LDO output, but it looks like it just settles to ~5V and stays flat. That begs the question - where is the 65mA going if not to the DC/DC?  

Philip Kersey said:

What I don't understand though, is why does the current only reach ~65mA? I would think it would be ~160mA. If it is hitting a thermal limit, why does it happen at -40C, but not +55C. Perhaps because there is more current at +55C, so it doesn't stay stuck for as long? At -40C in this condition, the power dissipation in this stuck condition is ~(22V-5V) * 65mA = 1.1W. It seems if we are soaking at -40C for a long time prior to start, this wouldn't reach the +150C junction limit correct?

I don't understand why it would only source 65mA with a 5V output either. It sounds characteristic of a brickwall current limit, but as I mentioned before it seems unlikely that the current limit would shift that low. On your eval board you can test this by adjusting the load impedance of the LDO and see if the output voltage shifts according to VOUT = RLOAD * 65mA. I highly doubt that the junction temperature gets even close to 150C. 

Regards,

Nick