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UC1843A: Current Mode Boost Slope Compensation

Part Number: UC1843A


I have inherited a 45 KHz current mode converter.  Input voltage is 25V +/- 7V.  71V is generated by way of a 135 uHy inductor that charges seven 1000 Al Electrolytic (YES - 7 - SEVEN) - tangent of loss angle is 0.08, so ESR per is 0.106 Ohms.  The 71V supplies a 100 KHz Flyback that delivers ~ 16W - Assuming ~ 75 pct efficiency the 71V Boost sees ~ 21 Watts.  The design has slope compensation implemented but I believe it was not done correctly.  I have looked at some of the literature available but I find it cryptic and incomplete.  Some examples show a DC blocking capacitor in series with the summing resistor and some don't.  Seems to me the current loop is over compensated  1) what (negative) effect can an over compensated current loop have on regulation, transient response and stability?  2) Can you provide an app note that shows step by step instructions on how to add a positive slope to the (0.22 Ohm) current sense signal?

THANKS