• State TI Thinks Resolved
  • Locked Locked
  • Replies 11 replies
  • Answers 2 answers
  • Subscribers 64 subscribers
  • Views 320 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ28Z620: MAC Access is not doing what the datasheet says

Robin Yuan
Prodigy 20 points
Part Number: BQ28Z620
Other Parts Discussed in Thread: EV2400, BQSTUDIO

Hi,

For some reason, my BQ28Z620 is pulling the DSG gate down but pulling the CHG data high. So, I am hoping to use to use the MAC command to enable the DSG FET.

So I first tried out the example with the Chemical ID but it is not doing what the datasheet says. I am using a STM32 to talk to it via I2C and I can get info like voltage and bat status from it with no problem.

Here is what I have done:

Send 0x55+W, 0x3E, 0x06, 0x00 using HAL_I2C_Master_Transmit.

Then, I used HAL_I2C_Master_Receive to read from the BQ28Z620, but i got {0x10, 0x12, 0x0 <repeats 30 times>, 0xd7, 0x6, 0x0, 0x2, 0x0 <repeats 28 times>} as a result.

I have the following four questions:

  1. Is this expected? Looks like I am missing the first two bytes which are the verification bytes 0x06 and 0x00.
  2. It also says the checksum is 0x0 and the length is 0x2, which seems wrong?
  3. Also, part A says the length is 36 bytes yet in part d it says the length is 6. What is going on? Where do these numbers come from?
  4. Why does it say `Read the result from MACSubcmd() and MfgMACData()` when i am only using 0x3E which is MACSubcmd() ?

Thank you!

  • 0
    TI__Mastermind 24741 points

    Hello Robin, 

    I recommend referring to the Gauge Communication Application Report. I believe this document goes over I2C communication with a host. Additionally, I believe the following image taken from the TRM shows an example of how to read from the MACSubcmd(). 

    Regards, 

    Jonny. 

  • 0 in reply to Jonny
    Prodigy 20 points

    Thanks for the reply! but in the Gaugae Communication Application note, i unfortunately didn't find a single word describing the MAC control and i couldnt find the source of the screenshot you sent me 

  • 0 in reply to Robin Yuan
    TI__Mastermind 24741 points

    Hello Robin, 

    The screenshot was taken from section 14.2.23 of the TRM. Additionally, the I2C address should be 0xAA not 0x55. The screenshot I have provided gives the pseudo code for writing the seal/unseal keys to the gauge. To read the chemID for example, you would follow the general procedure. 

    Regards, 

    Jonny. 

  • 0 in reply to Jonny
    Prodigy 20 points

    Hi Jonny,

    Thanks for the reply. I decided to get an EV2400 to avoid the trouble but i noticed smth extremely odd.

    1. When my FET_EN is high, my dsg gate is at 8.06V and chg gate is at 4.236V. 
    2. When my FET_EN, CHG_TEST, and DSG_CHG are low, my dsg gate is at 8.06V and chg gate is at 4.236V.
    3. When my FET_EN == 0, CHG_TEST == 0, and DSG_CHG == 1, my dsg gate is at 8.60V and chg gate is at 4.236V.
    4. When my FET_EN == 0, CHG_TEST == 1, and DSG_CHG == 0, my dsg gate is at 8.06V and chg gate is at 17.5V.
    5. When my FET_EN == 0, CHG_TEST == 1, and DSG_CHG == 1, my dsg gate is at 8.60V and chg gate is at 17.5V.

    For all cases other than case 1 when FET_EN is high, the bit values of CHG_TEST and DSG_TEST are the same as CHG and DSG in the operation status line. 

    Is this expected or is my chip fried? None of the options allows me to follow pull down the gates on either fet.

  • 0 in reply to Robin Yuan
    Prodigy 20 points

    Hi Jonny,

    Thanks for the reply. I decided to get an EV2400 to avoid the trouble but i noticed smth extremely odd. I am using a 2s1p config right now with 18650.

    1. When my FET_EN is high, my dsg gate is at 8.06V and chg gate is at 4.236V. 
    2. When my FET_EN, CHG_TEST, and DSG_CHG are low, my dsg gate is at 8.06V and chg gate is at 4.236V.
    3. When my FET_EN == 0, CHG_TEST == 0, and DSG_CHG == 1, my dsg gate is at 8.60V and chg gate is at 4.236V.
    4. When my FET_EN == 0, CHG_TEST == 1, and DSG_CHG == 0, my dsg gate is at 8.06V and chg gate is at 17.5V.
    5. When my FET_EN == 0, CHG_TEST == 1, and DSG_CHG == 1, my dsg gate is at 8.60V and chg gate is at 17.5V.

    For all cases other than case 1 when FET_EN is high, the bit values of CHG_TEST and DSG_TEST are the same as CHG and DSG in the operation status line. 

    Is this expected or is my chip fried? None of the options allows me to follow pull down the gates on either fet.

    Thank you so much for your help!! Really appreciate it!!

  • 0 in reply to Robin Yuan
    TI__Mastermind 24741 points

    Hello Robin, 

    If FET_EN is set then the gauge will control the FETs, and you will not be able to manually control the FETs. If FET_EN is not set then you will be able to manually toggle the CHG and DSG FETs using the CHG_FET_TOGGLE and DSG_FET_TOGGLE commands. 

    Regards, 

    Jonny. 

  • 0 in reply to Jonny
    Prodigy 20 points

    Could you please read case 2-5 again? Even when my FET_EN == 0, i wasn't able to control the DSG and CHG FET as i hped.

  • 0 in reply to Robin Yuan
    TI__Mastermind 24741 points

    Hello Robin, 

    I have double checked this here using the EVM and bqStudio. When FET_EN is 0 (shown as green in bqStudio), I am able to toggle both the CHG and DSG FETs using the CHG_FET_TOGGLE and DSG_FET_TOGGLE commands. Are you seeing this behavior across multiple devices? 

    Regards, 

    Jonny. 

  • 0 in reply to Jonny
    Prodigy 20 points

    hi,

    The bqstudio does give me the correct value, But the gate voltage seems incorrect. Could you look into that a bit?

  • 0 in reply to Robin Yuan
    TI__Mastermind 37761 points

    Hey Robin,

    Today is a holiday and no one is in the office. We will get back to you next week.

    Regards,
    Nick Richards

  • 0 in reply to Adrian
    TI__Mastermind 24741 points

    Hello Robin, 

    For the Charge FET, when the XCHG bit is high (shown as red in bqStudio), then the CHG FET is disabled, when the CHG bit is high then the CHG FET is enabled. The same can be said for the Discharge FET and the XDSG and DSG bits. 

    Regards, 

    Jonny.