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TPS65910: SWIO output capacitor

Dice-K
Mastermind 7500 points
Part Number: TPS65910

Hi support team,
This is a question about TPS65910A31A1RSLT.

14pin: At SWIO output +1.5V, supply destination device (CPU, DDR3 SDRAM) input conditions (MAX side: 1.575V) were found to be just at the limit.

A 10uF bypass capacitor is attached to the output as recommended in the datasheet.

A bypass capacitor is also attached to the CPU and SDRAM side of the supply destination, and I have confirmed that when the bypass capacitor used for the SDRAM is removed, the +1.5V ripple is reduced.
(The bypass capacitor removed at this time is 100uF.)

I believe that the problem is due to excessive capacity components (ESL components as well?), but is this the correct solution?

Regards,
Dice-K

  • +1
    TI__Genius 10772 points

    Hi Dice-K,

    Yes, I believe this should be the correct solution. 

    If the capacitance is too large it can introduce a large amount of ESR, and a higher ESR has a slower response time in turn which could lead to these higher levels as it works to catch up when this is seen. The capacitance being a high value can also result in a slower process in which mentioned earlier, could lead to these higher levels.

    Thanks,
    Field